Analog switch circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307585, 307443, H03K 17687, H03K 1716

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active

050197312

ABSTRACT:
An analog switch circuit includes an input terminal to which an analog signal is supplied, an output terminal, first, second and third transistors, and a delay circuit. The first transistor has first and second electrodes and a gate, and the first electrode of the first transistor is connected to the input terminal. The second transistor has first and second electrodes and a gate, and the first electrode of the second transistor is coupled to the first electrode of the first transistor. The gate of the second transistor is supplied with a clock signal supplied from an external circuit. The delay circuit delays the clock signal by a predetermined time and generates a delayed clock signal supplied to the gate of the first transistor. The third transistor has first and second electrodes and a gate. The first and second electrodes of the third transistor are coupled to each other and to the second electrode of the second transistor and the output terminal through which an analog output signal is output. The gate of the third transistor is controlled so that the third transistor is turned ON when the second transistor is turned OFF.

REFERENCES:
patent: 4308468 (1981-12-01), Olson
patent: 4393318 (1983-07-01), Takahashi et al.
patent: 4511814 (1985-04-01), Matsuo et al.
patent: 4651037 (1987-03-01), Ogasawara et al.
Patent Abstracts of Japan, vol. 12, No. 268, (E-638)(3115), Jul. 27, 1988; & JP-A-6350208, (Sony), 03.03.1988.
Patent Abstracts of Japan, vol. 9, No. 240 (E-345)(1963) Sep. 26, 1985; JP-A-6090425 (Nippon Denki K.K.) 21.05.1985.
IEEE Journal of Solid-State Circuits, vol. SC-20, No. 6, Dec. 1985, pp. 1206-1213, New York, U.S.; W. B. Wilson et al.: "Measurement and Modeling of Charge Feedthrough in N-Channel MOS Analog Switches".

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