Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2007-11-08
2010-10-12
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S185270, C365S185280, C365S185180, C365S185030, C257S321000, C257S316000, C257S315000
Reexamination Certificate
active
07813177
ABSTRACT:
A single-poly EEPROM memory device comprises a control gate isolated within a well of a first conductivity type in a semiconductor body of a second conductivity type, first and second tunneling regions isolated from one another within respective wells of the first conductivity type in the semiconductor body, a read transistor isolated within a well of the first conductivity type, and a floating gate overlying a portion of the control gate, the read transistor, and the first and second tunneling regions. The memory device is configured to be electrically programmed by changing a charge on the floating gate that changes the device threshold voltage. In one embodiment, the memory device is configured to be electrically programmed by applying a first potential between the first and second tunneling regions, and a second potential to the control gate, the second potential having a value less than the first potential.
REFERENCES:
patent: 6317349 (2001-11-01), Wong
patent: 6333623 (2001-12-01), Heisley et al.
patent: 6693830 (2004-02-01), Hu et al.
patent: 2004/0080982 (2004-04-01), Roizin
patent: 2009/0122614 (2009-05-01), Mitros et al.
patent: 1020060035124 (2006-04-01), None
Heisley David Alan
Mitros Jozef Czeslaw
Brady W. James
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tran Andrew Q
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