Analog signal delay circuit

Details Analog signal delay circuit Analog signal delay circuit

1979-01-18

1981-06-02

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307221D, 307562, 307564, H03K 5159, H03K 1716, H03K 17687

Patent

active

042713668

ABSTRACT:
An analog delay circuit wherein an analog signal to be delayed as well as a reference voltage signal the voltage level of which is previously known are applied to an analog delay element comprising BBD, CCD or the like, and the reference signal is derived from the output of the analog delay element so that the reference signal or a signal associated therewith may be used for controlling a voltage to be applied to the analog element so as to set a bias voltage thereof.

REFERENCES:
patent: 3621402 (1971-11-01), Gardner
patent: 4121461 (1978-10-01), Butler et al.
patent: 4136287 (1979-01-01), Kephart
patent: 4138666 (1979-02-01), Eichelberger et al.
patent: 4156152 (1979-05-01), Butler

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