Analog pixel drive circuit for an electro-optical...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S099000, C345S100000, C345S204000, C345S214000

Reexamination Certificate

active

06249269

ABSTRACT:

FIELD OF THE INVENTION
The invention relates video and graphics display devices, to analog circuits for driving the picture elements (pixels) of video and graphics display devices, and, in particular, to analog circuits for driving the picture elements of a display device based on an electro-optical material.
BACKGROUND OF THE INVENTION
A substantial need exists for various types of video and graphics display devices with improved performance and lower cost. For example, a need exists for miniature video and graphics display devices that are small enough to be integrated into a helmet or a pair of glasses so that they can be worn by the user. Such wearable display devices would replace or supplement the conventional displays of computers and other devices. In particular, wearable display devices could be used instead of the conventional displays of laptop and other portable computers. Potentially, wearable display devices can provide greater brightness, better resolution, larger apparent size, greater privacy, substantially less power consumption and longer battery life than conventional active matrix or double-scan liquid crystal-based displays. Other potential applications of wearable display devices are in personal video monitors, in video games and in virtual reality systems.
Miniaturized displays based on cathode-ray tubes or conventional liquid crystal displays have not been successful in meeting the demands of wearable displays for low weight and small size. Of greater promise is a micro display of the type described in U.S. Pat. No. 5,596,451 of Handschy et al., the disclosure of which is incorporated into this disclosure by reference. This type of micro display includes a reflective spatial light modulator that uses a ferroelectric liquid crystal (FLC) material as its light control element.
The spatial light modulator of the FLC-based micro display just described is driven by a digital drive signal. The conventional analog video signal generated by the graphics card of a personal computer, for example, is fed to a converter that converts the analog video signal into a digital bitstream suitable for driving the spatial light modulator. The converter converts the analog video signal into a time domain binary weighted digital drive signal suitable for driving the spatial light modulator. The time durations of the bits of the time domain binary weighted digital drive are binary weighted, so that the duration of the most-significant bits is
2
n−1
times that of the least-significant bits, where n is the number of bits representing each sample of the analog video signal. For example, if each sample of the analog video signal is represented by 8 bits, the duration of each most-significant bit is 256 times that of each least-significant bit. Driving the pixels digitally means that the pixel driver must be capable of changing state several times during each frame of the analog video signal. The switching speed must be shorter than the duration of the least-significant bit. This requires that the drive circuitry in each pixel be capable of high-speed operation, which increases the power demand and expense of the micro display system. On the other hand, the long time duration of the most-significant bits of the digital drive signal means that the digital drive signal is static for the majority of the frame period.
Practical embodiments of the micro display referred to above typically locate the converter referred to above external of the micro display and connect the converter to the micro display by a high-speed digital link. The converter time multiplexes the digital drive signals for transmission though the digital link as follows: the least-significant bits for of the digital drive signals all the pixels of the spatial light modulator, followed by the next-least-significant bits of the digital drive signals for all the pixels, and so on through the most-significant bits of the digital drive signals for all the pixels. The digital link must be capable of transmitting all the bits representing each frame of the component video signal within the frame period of the component video signal. The digital link, its driver and receiver must be capable of switching at a switching speed shorter than the duration of the least-significant bit, yet remain static for times corresponding to the durations of the most-significant bits.
In addition, the converter requires a large, high-speed buffer memory to convert the parallel, raster-scan order digital signals generated from the analog video signal to a bit-order signal for each color component. This increases the cost and power requirements of the converter.
The digital serial link can be eliminated by locating the converter in the micro display itself, but relocating the converter increases the size, weight and complexity of the micro display. Moreover, miniaturizing the converter to fit it in the micro display can increase the cost of the converter. Finally, relocating the converter does not reduce its overall cost and complexity.
What is needed is a miniature display device that can operate in response to a video signal or graphics data and that does not suffer from the size, weight, complexity and cost disadvantages of the conventional digitally-driven micro display.
Conventional-sized video and graphics displays rely on cathode-ray tubes or full-size liquid crystal displays. The former are bulky, heavy and fragile. The former are also expensive to produce and are very heavy in the larger sizes required to realize the benefits of high-definition video. The latter are expensive to produce in screen sizes comparable with conventional cathode-ray tubes, and have a limited dynamic range and a limited viewing angle. What is also needed is a miniature display device that can form the basis of an full-size video and graphics display that would provide an effective alternative to conventional cathode-ray tubes and liquid crystal displays.
SUMMARY OF THE INVENTION
The invention provides an analog drive circuit for driving a pixel electrode in response to an analog sample derived from a video signal. The analog drive circuit comprises a sample selection section and a drive signal generator. The sample selection section receives and temporarily stores the analog sample during a sample load period. The drive signal generator generates a drive signal and applies the drive signal to the pixel electrode during a display period that follows the sample load period. The drive signal is composed of a sequence of a first temporal portion and a second temporal portion. The first temporal portion has a time duration substantially proportional to the analog sample temporarily stored in the sample selection section. The second temporal portion is the temporal complement of the first temporal portion.
The sample storage section may include a sample storage element, a sample selection gate, and a sample output gate. The sample selection gate opens during the sample load period to admit the analog sample to the sample storage element and is closed during a display period that follows the sample load period. The sample output gate opens either during or prior to the display period and is disposed between the sample storage element and the drive signal generator.
The drive signal generator may include a comparator that generates the drive signal and that comprises a first input to which the sample selection section is connected, and a second input to which a ramp signal is connected. The ramp signal has a duration equal to the display period.
The comparator may have a detection sense set by a sense control signal having opposite states in consecutive frames of the video signal. In this case, the analog drive circuit additionally includes first and second switching arrangements. The first switching arrangement alternately connects a ramp signal to (a) the first input and (b) the second input of the comparator in consecutive display periods. The second switching arrangement alternately connects the sample storage section to (a) the second input and (b) the f

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