Analog multiplier/divider utilizing substrate bipolar transistor

Details Analog multiplier/divider utilizing substrate bipolar transistor Analog multiplier/divider utilizing substrate bipolar transistor

1992-03-26

1993-05-25

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307494, 307498, 328158, G06G 716, G06G 700

Patent

active

052143210

ABSTRACT:
An analog multiplier/divider circuit comprising in basic form four bipolar transistors with all collectors in common and a high gain differential input amplifier controlling an output transfer means. All input signals and the output signal are applied as currents to the emitters of the four transistors. The emitters, as opposed to the collectors, are monitored and sensed by the amplifier. The four transistors are arranged such that the base-emitter voltage of the third transistor, the value of which is proportional to the logarithm of a third input current applied to its emitter, is added to the base-emitter voltage of the fourth transistor, the value which is proportional to the logarithm of the output current applied to the fourth transistor's emitter. The sum of the two voltages is forced by the amplifier to be equal to the sum of the base-emitter voltage of the first transistor, the value which is proportional to the logarithm of a first input current applied to its emitter, and the base-emitter voltage of the second transistor, the value of which is proportional to a second input current applied to the second transistor's emitter. The amplifier forces the first sum equal to the second sum by comparing the two sums at its inputs and regulating the output current until the amplifier inputs are equal.

REFERENCES:
patent: 3662187 (1972-05-01), Ayres et al.
patent: 3805092 (1974-04-01), Henson
patent: 4572975 (1986-02-01), Bowers
patent: 4577119 (1986-03-01), Kim et al.
patent: 4599572 (1986-07-01), Nakayama
patent: 5151624 (1992-09-01), Stegherr et al.

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