Analog multiplier circuit including opposite conductivity type t

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307498, 307529, 328160, 364813, G06G 716

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044829779

ABSTRACT:
A monolithic integrated analog multiplier circuit includes a series aiding connection of semiconductor junctions, each junction being arranged for conducting an input current from one of plural sources of input currents and for producing a voltage proportional to a logarithm of the input current conducted therethrough. A pair of opposite conductivity type transistors have their base-emitter circuits arranged to respond to the voltages produced at opposite ends of the series aiding connection for converting the voltage produced across the connection into an output collector current proportional to the product of the input currents.

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patent: 4311928 (1982-01-01), Hirata et al.
patent: 4349755 (1982-09-01), Bee
Nedungadi: A Precise Large Current Ratio Integrated Gain Cell, Proceedings of the IEEE, vol. 68, No. 3, Mar. 1980, pp. 412-413.
Raytheon Co., Linear Integrated Circuit Data Book, No. 7597360, pp. 7-50 to 7-59.

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