Boots – shoes – and leggings
Patent
1980-06-19
1984-04-24
Ruggiero, Joseph F.
Boots, shoes, and leggings
364862, 365 45, 365183, G06J 100, G11C 2700
Patent
active
044451890
ABSTRACT:
The present invention is directed to an analog memory for storing digital information in analog signal form. Typically, digital information is stored in digital signal form, where each digital bit is stored in a separate digital memory cell. In accordance with the present invention, an analog memory such as a charge transfer device (CTD), bubble memory, or magnetostrictive memory is used to store analog signals. Each analog signal is representative of a plurality of digital bits, thereby providing storage for a plurality of digital bits in each analog memory cell. Use of such an analog memory in combination with a digital system facilitates a hybrid memory, where digital information is stored in analog signal form. In one embodiment, a digital to analog converter is used to convert digital information from a digital processor to analog signal form for storage in an analog memory and an analog to digital converter is used to convert analog signals stored in the analog memory to digital signal form for processing with the digital processor. In another embodiment, an analog read only memory is used to store a program for a stored program digital computer in analog signal form. Storage of digital information in analog signal form increases the efficiency of storage because a plurality of digital bits can be stored in each memory cell. An embodiment having analog error compensation utilizes a reference signal for adaptive compensation of errors. Various systems using such memories are disclosed including signal processors, stored program computers, reverbation systems, and others.
REFERENCES:
patent: 3315235 (1967-04-01), Carnevale et al.
patent: 3355719 (1967-11-01), Fox
patent: 3462742 (1969-08-01), Miller et al.
patent: 3593313 (1971-07-01), Tomasezwski
patent: 3646522 (1972-02-01), Furman
patent: 3654499 (1972-04-01), Smith
patent: 3670313 (1972-06-01), Beausoleil et al.
patent: 3689902 (1972-09-01), Chang et al.
patent: 3701125 (1972-10-01), Chang et al.
patent: 3701132 (1972-10-01), Bonyhard et al.
patent: 3702988 (1972-11-01), Haney
patent: 3787852 (1974-01-01), Puckette
patent: 3797002 (1974-03-01), Brown
patent: 3810126 (1974-05-01), Butler
patent: 3857101 (1974-12-01), Puckette et al.
patent: 3859640 (1975-01-01), Eberlein et al.
patent: 3877056 (1975-04-01), Bailey
patent: 3887762 (1975-06-01), Uno et al.
patent: 3903543 (1975-09-01), Smith
patent: 3931510 (1976-01-01), Kmetz
patent: 3941979 (1976-03-01), Cragon
patent: 3947826 (1976-03-01), Bockwoldt
patent: 3950732 (1976-04-01), Chang et al.
patent: 3956624 (1976-05-01), Audaire et al.
patent: 3967263 (1976-06-01), Chang et al.
patent: 4034199 (1977-07-01), Lampe et al.
White et al., "CCD and MNOS Devices for Programmable Analog Signal Processing and Digital Nonvolatile Memory", IEEE IEDM, Wash., D.C., 1973, pp. 130-134.
Theunissen, "Charge Transfer Devices", L'Onde Electrique, 1974, vol. 54, No. 8, pp. 405-413.
Boysel: "Adder On a Chip: LSI Helps Reduce Cost of Small Machine"; Electronics, Mar. 18, 1968, pp. 119-124.
Hopkins: "Electronic Navigator Charts Man's Path to the Moon", Electronics; Jan. 9, 1967, pp. 109-118.
Levy et al.: "System Utilization of Large Scale Integration", IEEE Transactions on Computers, Oct. 1967.
Beelitz et al.; "System Architecture for Large Scale Integration"; AFIPS Conference Proceedings; Nov. 1967.
"Analog Capacitance ROM with IGFET Bucket Brigade Shift Register", Brunn et al., IEEE Journal of Solid State Circuits; vol. SC-10; No. 1, pp. 55-59; Feb. 1975.
"A Nonvolatile Charge Addressed Memory"; White et al.; IEEE Journal of Solid State Circuits; vol. SC-10; No. 5; pp. 281-287; Oct. 1975.
A BYTE Organized NMOS/CCD Memory With Dynamic Refresh Logic", Varsnney et al.; IEEE Transactions on Electron Devices; vol. ED-23; No. 2, pp. 86-92; Feb. 1976.
"Compressed Refresh System for Use With CRT Image Display"; Chesarek' IBM Technical Disclosure Bulletin; vol. 20; No. 5; Oct. 1977.
Tiemann et al., "Intracell Charge Transfer Structures for Signal Processing", IEEE Trans on Electron Devices, vol. ED-21, No. 5, May 1974, pp. 300-308.
Engeler et al., "A Surface Charge Random Access Memory System", IEEE Journal of Solid State Circuits, vol. SC-7, No. 5, Oct. 1972, pp. 330-335.
Boonstra et al., "Analog Functions Fit Neatly Onto Charge Transport Chips", Electronics, Feb. 28, 1972, pp. 64-71.
Altman, "The New Concept for Memory and Imaging: Charge Coupling", Electronics, Jun. 21, 1971, pp. 50-59.
Wegener, "Appraisal of Charge Transfer Technologies for Peripheral Memory Applications", CCD Applications Conf., Sep. 1973, pp. 43-54.
Altman, "New MOS Technique Points Way to Junctionless Devices", Electronics, May 11, 1970, pp. 112-118.
Amelio, "Physics and Applications of Charge Coupled Devices", IEEE Intercon, Mar. 26-30, 1973, pp. 1-6.
Tompsett, "Charge Transfer Devices", J. VAC Sci. Technol., vol. 9, No. 4, Jul.-Aug. 1972, pp. 1166-1181.
Carnes et al., "Charge Coupled Devices and Applications", Solid State Technology, Apr. 1974, pp. 67-77.
Keshavan et al., "Non Volatile Charge Storage Cell for Random Access Memory Applications", IBM Tech. Dis. Bull., Feb. 1974, pp. 2806, 2807.
Fischer et al., "Non Volatile Charge Coupled Memory", IBM Tech. Disc. Bull. R & D, vol. 15, No. 3, Aug. 1972, pp. 741, 742.
Electronics Review, "Japanese Develop Non Destructive Analog Semiconductor Memory", Electronics, Jul. 11, 1974, pp. 29-30.
Hyatt Gilbert P.
Ruggiero Joseph F.
LandOfFree
Analog memory for storing digital information does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Analog memory for storing digital information, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Analog memory for storing digital information will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-119036