Analog memory circuit utilizing a field effect transistor for si

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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357 38, 307304, 340173CA, H01L 2980

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active

039710556

ABSTRACT:
An analog memory circuit using a field effect transistor having a semiconductive substrate, first and second semiconductive regions forming a PN junction therebetween, the first region being capacitively coupled to the current path portion to form a capacitor, and a control electrode connected to the second region. The analog memory circuit stores a signal in the capacitor between the first region and the current path portion.

REFERENCES:
patent: 3443172 (1969-05-01), Koepp
patent: 3538399 (1970-11-01), Bresee et al.
patent: 3578514 (1971-05-01), Lesk
patent: 3663873 (1972-05-01), Yagi
patent: 3740689 (1973-06-01), Yamashita
A Proposed Vertical Channel Veriable Resistance Fet; Proceedings IEEE, vol. 59, No. 5 May 1971.
IBM Technical Disclosure Bulletin, vol. 14, No. 1 June 1971.

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