Analog memory

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185250, C365S045000

Reexamination Certificate

active

07808857

ABSTRACT:
According to a preferred embodiment of the present invention, an analog memory includes a first to third memory blocks. Each of the first to third memory blocks includes a plurality of capacitive elements for storing electric charges corresponding to an input signal, an output line for transferring the electric charges, and a plurality of MOS transistors each for changing connection between the capacitive element and the output line. When a signal is outputted from the output line to a buffer circuit by sequentially connecting the capacitive element to the output line in the first memory block, all connections between the capacitive elements and the output line are disconnected in the second and third memory blocks with the output line of the first memory block and the output line of the second memory block connected.

REFERENCES:
patent: 4807168 (1989-02-01), Moopenn et al.
patent: 6061279 (2000-05-01), Toda et al.
patent: 6529049 (2003-03-01), Erhart et al.
patent: 2006-186562 (2006-07-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Analog memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Analog memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Analog memory will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4197635

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.