Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2002-09-25
2003-07-01
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S277000, C330S288000
Reexamination Certificate
active
06587001
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to load driver amplifiers, also know as buffers, suitable for use as a line driver in driving signal-carrying cables in a focal plane detection circuit comprising an array of detectors such as infrared detectors, and more particularly, to construction of a buffer in the form of a source or emitter follower circuit.
A situation of particular interest herein is a focal plane detector array which comprises numerous detector elements each of which converts incident electromagnetic radiation to an electric signal. Cables connect the respective detector elements to signal processing circuitry, wherein the signals of the respective detector elements are gathered and processed electronically to produce an image of a scene being viewed by the array of detectors. Buffers interconnect the detector elements with the cables for driving the cables with the respective detected signals. For viewing subject matter that changes rapidly and/or for rapidly sampling signals of the detector elements, each of the buffers must have adequate bandwidth and dynamic response, in terms of slew rate, to pass both the leading edge and the trailing edge of a detected signal.
Line driver amplifiers have been constructed in the form of push-pull circuits, as well as emitter followers and source followers. Push-pull buffers based on voltage-follower operational amplifiers typically have higher power dissipation for a given settling speed, due in part to slew-rate limitations. Some designs also require a minimum output capacitance to guarantee stability, if the operational amplifier is to be compensated by the output load capacitance. Circuit designs which do not have the foregoing problems typically have low-output voltage range, or are constructed of very complex circuitry which is of disadvantage in the situation wherein space must be conserved, as in the case of the focal plane detector array. Furthermore, typical push-pull buffers of the prior art have reduced output voltage range, or require additional special bias voltages to increase the output range.
Simple source-followers or emitter-followers of the prior art have higher power dissipation for a given settling speed, due to slew-rate limitations, than is desirable in the situation of the focal plane detector array. It is noted that focal plane detector arrays are mounted typically within a cryogenic environment. Excessive power dissipation places and additional burden on the Dewar employed for regulation of the temperature. Available emitter source follower buffers suffer from higher power dissipation than do other circuits, such as the push-pull configuration and the current-mirror circuits, due to the large static current required to achieve the high slew rate and the bandwidth.
SUMMARY OF THE INVENTION
The aforementioned problems are overcome and other advantages are provided by a low power analog line driver which, in accordance with the invention, employs a sense circuit and a high-speed, dynamically activated current load to significantly reduce the power required by either a source follower or an emitter follower buffer. The circuit senses the input signal to the buffer, and compares the input signal to the output signal of the buffer. If there is a significant difference between the input and the output signals, a large load current is switched into the output of the buffer in order to temporarily speed up the response of the buffer. Once this speed-up has been accomplished, the large load current is terminated, and the emitter follower or source follower resumes normal operation with a very low load current.
The circuit of the invention has very low power dissipation when compared to competing circuits (for the same settling speed), and has a larger output swing than typical push-pull output buffers. The circuit of the invention has the additional advantage in that the circuit can be constructed directly on a chip along with other components of an electronic system to save space and facilitate manufacture. In the case of the use of the invention with a focal plane array in an optics system, such as an infrared imaging system, all components are located on a common circuit board or chip which contains the readout integrated circuit, and therefore requires no off-chip support circuitry. Furthermore, the circuit of the invention is compatible with existing electronic systems currently in use, which circuitry already includes an off-focal plane current source load. The lower power has significant positive impact on integrated Dewar assemblies and cooler margins since there is significantly lower cryogenic power dissipation. For general battery-powered analog applications, the reduced power dissipation results in longer battery life. The circuit of the invention can be utilized in numerous focal plane programs. The most significant advantage is use in those programs that utilize small tactical mechanical coolers or passive space coolers. However, it is to be noted that the circuitry of the invention is useful also in numerous other applications wherein there is a requirement for driving a high-capacitance load with a signal having a rapid rise time and a rapid fall time.
REFERENCES:
patent: 5881014 (1999-03-01), Ooishi
patent: 6333623 (2001-12-01), Heisley et al.
Vampola John L.
Wyles Richard H.
Choe Henry
Lenzen, Jr. Glenn H.
Raytheon Company
Schubert William C.
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