Analog interconnect testing

Details Analog interconnect testing Analog interconnect testing

1995-12-07

1997-03-11

Wieder, Kenneth A.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324 731, 324755, 3241581, 371 28, 371 251, 371 225, G01R 3128

Patent

active

056105304

ABSTRACT:
A boundary scan interface structure (R1, R2, R3) connected between a first terminal (101) of a first analog circuit and a second terminal (103) of a second analog circuit is evaluated by selecting a test voltage to be applied to the first terminal, determining an expected voltage that is expected to be produced at the second terminal in response to application of the test voltage to the first terminal, selecting a reference voltage (REF) as a function of the expected voltage, applying the test voltage to the first terminal to produce a response voltage at the second terminal, and comparing the response voltage to the reference voltage.

REFERENCES:
patent: 3867693 (1975-02-01), Saxenmeyer
patent: 4298969 (1981-11-01), Rickenbacker
patent: 4339400 (1983-08-01), Rockwell
patent: 4446421 (1984-05-01), Berde
patent: 4578636 (1986-03-01), Bakke
patent: 4651084 (1987-03-01), Welsh
patent: 4996487 (1991-02-01), McSparran
patent: 5418470 (1995-05-01), Dagostino
K. P. Parker, J. E. McDermid and S. Oresjo, "Structure and Metrology for and analog Testability Bus", IEEE 1993, International Test Conference, Paper 15.2, pp. 309-317 [Oct. 17-21, 1993].
M. Jarwala, S. Tsai, "A Framework for Design for Testability of Mixed Analog/Digital Circuits", IEEE 1991, Custom Integrated Circuits Conference, Paper 13.5 pp. 1-4.

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