Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2002-07-30
2004-09-21
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C708S819000
Reexamination Certificate
active
06795001
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to an analog FIR (=finite impulse response) filter comprising an analog delay-line. FIR-filters, which are based on an analog delay-line, are useful in quite a number of applications. Very important is the application of such filters for general purpose spectral shaping and general purpose phase-linear filtering. Other applications are phase-linear pre-filtering and post-filtering to avoid aliasing in A/D and D/A conversion, in echo-producing and echo-canceling circuits etc. In these devices the delay-line usually has a plurality of taps from which the delayed signals are taken. In other devices the delay-line has only one output tap whereby the signals from the output tap and the input signals are combined, such as in the demodulation of PAL TV signals and in the implementation of comb filters to avoid cross-color distortion in PAL TV.
Originally analog delay-lines have been made by means of acoustic wave transmission in electromechanical devices. The invention of the bucket-brigade memory, later on generalized to charge-coupled-device (CCD) structures allowed the implementation of delay-lines in solid-state circuitry. However, this kind of analog delay-lines suffer from being prone to signal-deterioration, especially when the delay-line is long so that many signal transfers in the delay-line take place.
SUMMARY OF THE INVENTION
Today delay-lines are usually implemented by means of digital memories with A/D and D/A converters as I/O interfaces. However, the use of digital delay-lines could impose problems if relatively high bandwidths and high resolutions are required. Therefore it is an object of the invention to provide a FIR-filter comprising a delay-line which is able to handle the signals to be delayed in an analog fashion, and which does not suffer from the signal deterioration of prior art analog FIR-filters. The FIR-filter of the present invention is therefore characterized by an asynchronous &Sgr;&Dgr; modulator receiving an analog input signal and generating amplitude-discrete time-continuous pulses, a delay-line receiving said amplitude-discrete time-continuous pulses and comprising a sequence of delay cells for generating delayed amplitude-discrete time-continuous pulses at one or more outputs of the delay-line, and means connected to said one or more outputs for using the delayed amplitude-discrete time-continuous pulses to generate a filtered version of the analog input signal.
The asynchronous &Sgr;&Dgr; modulator accepts an analog input signal and produces a square wave, which has a time varying frequency and a time-varying duty-cycle. The duty-cycle is a linear function of the amplitude of the input signal, which implies that the analog input signal is preserved in the baseband part of the frequency spectrum of the square wave. Principle, construction and properties of the asynchronous &Sgr;&Dgr; modulator have been described in an article “Analog-to-Digital Conversion via Duty-Cycle Modulation”, IEEE Transactions on Circuits and Systems, vol.44, no 11, November 1997, pp. 907-914.
The asynchronous &Sgr;&Dgr; modulator is followed by a delay-line for amplitude-discrete time-continuous pulses. This delay-line has to transfer merely a two-valued signal, so that the cells of the delay-line can be constructed by non-linear means. The signal content is preserved in the zero crossings of the signal and therefore, when the edges of the square wave are sufficiently steep, the signal to noise ratio can be maintained at a high level, even when the delay-line comprises a large amount of cells.
Subsequently, when a delayed version of the analog input signal is desired, the output of the last delay cell is followed by a low pass filter, which passes the base band. On the other hand, when an analog FIR-filter for other purposes is required, the delay-line is provided with a number of taps whose output square waves are each multiplied by a weighting factor and the weighted square waves are combined to constitute the filtered output signal of the filter.
It may be observed that the above referenced IEEE-article FIG. 3
b
shows an asynchronous &Sgr;&Dgr; modulator, which is followed by a sequence of delay cells for delaying the amplitude-discrete time-continuous pulses generated by the asynchronous &Sgr;&Dgr; modulator. However this arrangement is not included in a filter but in an AD-converter, wherein the output square waves of the delay-line are sampled with high frequency synchronous sampling pulses to constitute a synchronous 1-bit digital signal. In contradistinction, the arrangement of the present inventions seeks to constitute an analog filter with amplitude-discrete means, without the necessity of using high frequency sampling.
As stated above, the delay cells may be constructed by non-linear means. For instance, a chain of inverters could serve the purpose. However, because each inverter stage, when implemented in present day technology, has only a very small delay of a few picoseconds, a large number of inverters is usually needed to provide sufficient delay. Especially when relatively low frequency signals have to be filtered, long delay times are required so that a very large number of inverters is needed. This drawback may be overcome if, according to a further aspect of the invention, the analog FIR-filter is characterized in that each of the delay cells comprises means for generating a one-shot pulse with a leading edge and a trailing edge, wherein the leading edge of a cell in the sequence is started by the trailing edge of the one-shot pulse generated in the previous cell in the sequence.
Preferably the analog FIR-filter of the invention may be further characterized in that each of the delay cells comprises means for generating spikes at the trailing edge of said one-shot pulse and means to apply said spikes to the next cell in the sequence of cells and/or to a latch for generating delayed amplitude-discrete time-continuous pulses. This implementation of the delay cell allows a more accurate delay as compared with a delay cell that receives and generates full amplitude-discrete time-continuous pulses. When a spike of the previous cell arrives, a capacitance is discharged and the one-shot pulse starts. Subsequently the capacitance is charged by a DC bias current and at a certain moment, when the voltage across the capacitance reaches a threshold value, the one-shot pulse ends. In this arrangement, the duration of the one-shot pulse, which constitutes the delay of the cell, may be easily set by properly choosing the values of the capacitance and of the DC bias current. Moreover the delay may be easily controlled, if desired, by controlling the magnitude of the bias current.
There are basically two design parameters of the FIR-filter of the present invention. The first parameter is the center frequency of the asynchronous &Sgr;&Dgr; modulator, i.e. the frequency of the square wave delivered by the asynchronous &Sgr;&Dgr; modulator when its input signal is zero. To safeguard a low aliasing distortion in the modulator, this center frequency should be high enough, e.g. higher than three times the baseband bandwidth of the input signal. The second parameter is the setting of the width of the one-shot pulses in the delay cells. This pulse-width should be just smaller than the smallest pulse-width that can occur in the square wave of the asynchronous &Sgr;&Dgr; modulator, in order to avoid that the one-shot pulses overlap the edges of the square wave to be delayed. A calculation reveals that the width of the one-shot pulses may not be larger than one quarter of the period of the center frequency. This of course limits the delay, which can be obtained per cell. An improvement of this figure can be obtained when the analog FIR-filter of the present invention is characterized by two delay-lines, one for delaying the leading edges of the amplitude-discrete time-continuous pulses generated by the asynchronous &Sgr;&Dgr; modulator and one for delaying the trailing edges of the amplitude-discrete time-continuous puls
Ure Michael J.
Wamsley Patrick
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