Analog filtering with symmetrical timing using a single...

Details Analog filtering with symmetrical timing using a single... Analog filtering with symmetrical timing using a single...

2000-11-17

2002-06-18

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Unwanted signal suppression

C327S554000, C327S337000

Reexamination Certificate

active

06407626

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
Present invention relates generally to analog circuit and mixed signal circuits, and more specifically, to implementing a symmetrical filter in an analog or mixed signal circuit using a single comparator.
BACKGROUND
Analog signals in circuits are typically voltages that have the ability to vary continuously between two voltages, known as rails. Accordingly, circuits that process only analog signals are called analog circuits.
In contrast, digital signals and circuits are typically discreet, predefined voltages, such that a voltage (V) signal will be interpreted as being nearest discreet, predefined voltage. For example, some computers are digital circuits (meaning circuits that process only digital signals) that operate at the discreet, predefined voltages of 0 v and 5 v. Then, if a voltage signal is received of 0.4 v, it is interpreted as the nearest discreet, predefined voltage, which is in this case 0 v. When using two discreet, predefined voltages, the digital circuit is said to be binary. Generally, for logic evaluation purposes, the higher of the two discreet, predefined voltages is called 1 and the lower of the two discreet predefined voltages is called 0.
Mixed signal circuits (MXCs) combined elements of both analog signal processing and digital signal processing. Often, but not always, MXCs are employed at the boundary between an analog circuit and a digital circuit where they are used to convert an analog signal into a digital signal and/or used to change a digital signal to an analog signal.
Since light, sound, and other stimuli that make up the environment are mostly analog in nature, while most computer processing is digitized, and since MXCs carry signals between the (real world) which is mostly analog, and the computer world, which is primarily digital, MXCs are used in a variety of products. For example, the telecommunications industry utilizes MXCs to transfer sound between the real world of voice and the digital world of telephone networks, such as a Public Land Mobile Network (PLMN), for example. Likewise, cellular telephones and other devices that use transceivers incorporate MXCs to translate between analog signals used in analog circuits and the digital signals used in digital circuits.
Within a MXC or an analog circuit, a symmetrical filter (the filter) may be used to remove or separate noise from the circuit, and to produce a discreet, predefined digital output voltage in either a digital input voltage or an analog input voltage. Symmetrical filters are often preferred over other types of filters because symmetrical filters provide a rise time and a fall time which are the same, as discussed below.
FIG. 1
(prior art) is a circuit diagram of a prior art filter.
The filter uses a comparator in order to produce a discreet, predefined digital output voltage that is equivalent to a supply voltage (Vsup) when a voltage on a capacitor (Vcap) is greater than a reference voltage (Vref), and equivalent to a ground voltage (Vgnd) when the Vcap is less that Vref. Vref is provided by a voltage divider which is comprised of a first resistor
70
and a second resistor
80
. Typically, the first resistor
70
and the second resistor
80
are of the same resistance value, and the voltage divider is placed across Vsup and Vgnd. Accordingly, the reference voltage is typically the median value of the Vsup and the Vgnd.
Vcap is provided by a capacitor
30
. With the input voltage (Vin) is greater than the Vcap, an inverter
50
which functions as a switch, allows a first current source
10
to charge the capacitor
30
. Likewise, when Vin is less that Vcap, inverter
50
allows a second current source
20
to drain a charge from the capacitor
30
.
Unfortunately, symmetrical filters configured according to the prior art suffer from several drawbacks. For example, a MXC may define an input voltage to be noise if Vin lasts for fewer than 20 microseconds (us).
FIG. 1
a
(prior art) is a timing diagram illustrating selected voltage values in the Prior art symmetrical filter illustrated in FIG.
1
. Time in microseconds is illustrated across the horizontal axis, while voltage and volts is illustrated across the vertical axis. Vin is illustrated with dotted lines, Vcap is illustrated as a solid line having generally pyramid shaped rises and falls, and Vout is illustrated as a solid line having practically instantaneous rises and falls. When Vin, Vout, and Vcap have a value of 0 volts, it should be noted that in
FIG. 1
a
the graph of these voltages will result in line which appear to have voltages around but not approximately equal to 0 volts. It should be understood that this plotting of voltage values is done intentionally so that the viewer of
FIG. 1
a
may differentiate Vin, Vout, and Vcap when Vin, Vout, and Vcap each equal 0 volts. Likewise, Vin, Vout, and Vcap are shown in a similar manner when Vin, Vout, or Vcap equal 5 volts. Furthermore, for purposes of
FIG. 1
a
, Vref is assumed to be equal to 0 volts and Vsup is assumed to be equal to 5 volts.
Accordingly, at time T
0
equals 0 microseconds Vin, Vout, and Vcap are all equal to 0 volts. Then, at T
1
, an input voltage is received and Vin is said to go high. When Vin goes high, the capacitor
30
begins to charge as is illustrated by Vcap beginning to rise in value at T
1
, since the switch
50
will charge the capacitor
30
when the switch
50
receives the high Vin voltage. Next, at T
2
, Vin again returns to 0 volts (or is said to go low) which causes the switch
50
to cease charging the capacitor
30
. Accordingly, also at T=2, Vcap will again begin returning to 0 as the capacitor
30
discharges to 0 volts at time T
3
. From T
1
to T
2
Vin was not high long enough for Vcap to rise above Vref which is set at 2.5 volts. Thus, the pulse produced by Vin between T
1
and T
2
is considered noise, and is in
FIG. 1
a
properly filtered and prevented from producing an output voltage Vout.
At T
4
, Vin again goes high to 5 volts and Vcap again begins to rise. Then, at T
5
, Vcap has risen to where the Vcap is equal to Vref. Accordingly, the comparator
90
detects that Vcap is now greater than Vref and thus produces Vout at 5 volts. Then, at T
6
, Vin goes low to 0 volts and the voltage on the capacitor begins discharging since the switch
50
receives Vin at 0 volts and Vcap thus begins to fall. As long as Vcap remains above Vref, Vout remains high at 5 volts. However, when Vcap falls below Vref, Vout falls low to 0 volts, which is shown at time T
7
. Then, Vcap continues to fall to 0 volts at time T
8
. Note that Vin between time T
4
and T
6
is not interpreted as noise and should ideally result in a Vout having a duration equivalent to Vin. Unfortunately, due to the rise and fall time of Vcap, Vout is considerably shorter in duration than Vin. And, should the time that Vout is high be less than 20 microseconds, other circuit logic may interpret Vout to be noise. The misinterpretation of a proper Vin as noise could result in circuit errors. At time T
9
, Vin goes high to 5 volts and again the capacitor
30
begins charging so that Vcap begins rising. Then, at time T
10
, Vcap becomes greater than Vref thus triggering the comparator
90
to product Vout of 5 volts. At time T
11
, Vcap reaches 5 volts, indicating that the voltage across the capacitor
30
has reached 5 volts and that the capacitor
30
is fully charged. Accordingly, when the capacitor
30
is fully charged at 5 volts, Vout will remain high and no further charge can be placed on the capacitor
30
. Next, at time T
12
, Vin goes low to 0 causing the capacitor
30
to begin to discharge as shown by the falling of Vcap. Next, at T
13
, Vcap falls below Vref thus triggering the comparator
30
to produce Vout of 0 volts. Therefore, Vcap continues to fall until the capacitor
30
is fully discharged and Vcap is at 0 volts at time T
14
. Since Vout has the same duration as Vin between time T
9
and T
13
, the prior art circuit shown in
FIG. 1
has correctly filtered Vin. Thus,
FIG. 1
a
illustrates one problem

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