Analog FIFO memory device

Details Analog FIFO memory device Analog FIFO memory device

1998-05-13

2002-10-15

Miller, John (Department: 2614)

Television

Image signal processing circuitry specific to television

Noise or undesired signal reduction

C348S607000, C348S715000, C348S714000

Reexamination Certificate

active

06466273

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an analog FIFO memory device, and more particularly relates to technology for reducing fixed pattern noise generated inside an analog FIFO memory.
As is well known, CMOS-LSI technology has been continuously developing. An analog FIFO memory is one of the devices used in the field of analog CMOS-LSI designing. Like a digital FIFO memory, an analog FIFO memory outputs an analog signal by delaying the signal for a predetermined time.
FIG. 22
is a diagram showing a fundamental configuration for a conventional analog FIFO memory. As shown in
FIG. 22
, an analog FIFO memory consists basically of: an input buffer; an output buffer; memory elements (or memory cells); and an address counter. The analog FIFO memory specifies a memory element in response to a memory cell select signal output by the address counter. Next, the analog FIFO memory outputs the value of an analog signal stored in the specified memory element in the form of a voltage or charge through the output buffer. Then, the analog FIFO memory writes, into the memory element, the value of a voltage or the quantity of charge accumulated in the input buffer by the point in time of the output. That is to say, the analog FIFO memory performs so-called “read-modify-write” operations with respect to the memory cell specified by the address counter. In general, the address counter serves as a cyclic counter whereby the analog FIFO memory can delay a signal for a time corresponding to a cycle in which addresses make a round.
In such an analog FIFO memory, a capacitor element is generally used as a memory element. However, since a capacitor element is likely to be affected by noise, an offset voltage Vnoise, generated because of the accumulation of noise in capacitance, is added to an input voltage Vin of the analog FIFO memory. Also, it is known that the offset voltage Vnoise is variable depending upon the physical location of a memory element. That is to say, the output voltage Vout may be represented by the following equation:
Vout=Vin+Vnoise(
n
)
where n is the address of the memory element. In other words, the offset voltage Vnoise may be represented as a function of the address n of the memory element. Such an offset voltage Vnoise(n) is generally called “fixed pattern noise”.
FIGS. 23A and 23B
are drawings illustrating why the fixed pattern noise generates in an analog FIFO memory. In general, an analog FIFO memory device is implemented as a parallel connection of a plurality of memory buses. In each of the memory buses, a plurality of memory elements (usually implemented as capacitor elements) are connected in parallel to each other.
FIG. 23A
illustrates an analog FIFO memory implemented as a parallel connection of four memory buses via two multiplexers. In the analog FIFO memory shown in
FIG. 23A
, the path of an analog signal is divided into four so as to correspond to the respective memory buses. And, in any of the buses, the signal is to be stored. In such a case, a clock field slew produced by one of analog switches included in each of the multiplexers or parasitic charge generated when the analog switch is turned off leaks to and is accumulated as an offset voltage in a memory element. Since the amounts of leakage subtly differ among the respective analog switches, offset voltages such as those shown in
FIG. 23B
are added to respective output signals. The fixed pattern noise means such offset voltages.
When an analog FIFO memory is applied to TV signal processing, such fixed pattern noise constitutes a great obstacle.
Specifically, since the human eyes are very sensible to brightness, an S/N ratio permissible for a TV signal is as strict as −60 dB or less in the specification thereof. Thus, if the fixed pattern noise of an analog FIFO memory does not meet this specification, then the fixed pattern noise appears on the TV image as noticeable noise.
The offset of a switching device results from parasitic resistance, parasitic capacitance, a subtle switching time lag or the like. However, in the current circumstances, thorough and systematic analysis thereof has not yet been accomplished. Therefore, it is extremely difficult to totally eliminate the variation in offsets. In addition, considering the variation in device characteristics resulting from various factors during normal LSI fabrication processes, it is virtually impossible to suppress the fixed pattern noise to the value required by TV signal specifications or less through some modification of the fabrication processes.
Accordingly, if an analog FIFO memory is used for TV signal processing, fixed pattern noise undesirably appears on the TV image and adversely deteriorates the quality of image.
Analog FIFO memories are disclosed, for example, by K. Matsui, T. Matsuura, et al., in “CMOS Video Filters Using Switched Capacitor 14-MHz Circuits”, IEEE Journal of Solid-State Circuits, pp. 1096-1101, 1985 and by Ken A. Nishimura and Paul R. Gray, “A Monolithic Analog Video Comb Filter in 1.2-&mgr;m CMOS”, IEEE Journal of Solid-State Circuits, Vol. 28, No. 12, pp. 1331-1339, December 1993. However, none of these analog FIFO memories can prevent fixed pattern noise from being generated. Thus, the practical application of an analog FIFO memory for TV signal processing has still been unsolved for more than as long as ten years since the former report was submitted.
SUMMARY OF THE INVENTION
The present invention provides an analog FIFO memory device capable of reducing the influence of fixed pattern noise, generated inside the analog FIFO memory device, on signal components. A more particular object of the present invention is eliminating the adverse effects produced by an analog FIFO memory device on the TV image quality when the device is applied for TV signal processing.
Specifically, the analog FIFO memory device of the present invention includes an analog FIFO memory. The analog FIFO memory includes a plurality of memory elements. Each of the memory elements stores an analog signal. The analog FIFO memory delays input analog signals for a predetermined time and then outputs the delayed analog signals in accordance with an order of input of the input analog signals. The analog FIFO memory further includes an output transformer for performing a transformation on output signals of the analog FIFO memory so as to suppress influence of fixed pattern noise, generated inside the analog FIFO memory, on signal components of the output signals. The analog FIFO memory further includes an input transformer for performing a transformation, inverse of the transformation performed by the output transformer, on the input analog signals of the analog FIFO memory.
In the analog FIFO memory device of the present invention, the fixed pattern noise generated inside the analog FIFO memory is transformed by the output transformer so as to suppress the influence of the fixed pattern noise on the signal components. In this case, the signal components are also transformed by the output transformer. However, since the input signals of the analog FIFO memory device are subjected by the input transformer to the transformation inverse of the transformation performed by the output transformer, the resulting signal components are not transformed at all, and the original signal waveform is retained. Thus, it is possible to suppress the influence of the fixed pattern noise, generated inside the analog FIFO memory, on the signal components without modifying the signal components in any way.
In one embodiment of the present invention, the output transformer preferably performs a frequency modulation such that the frequency of the fixed pattern noise is shifted to reach a higher frequency exceeding a signal band.
In such a case, as a result of the frequency modulation performed by the output transformer, the frequency of the fixed pattern noise, generated inside the analog FIFO memory, is shifted to reach a higher frequency exceeding the signal band. By contrast, the frequency characteristics of the signal components ar

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