Analog FIFO memory and switching device having a reset operation

Static information storage and retrieval – Analog storage systems

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365221, G11C 2700

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active

058222367

ABSTRACT:
The invention provides an analog FIFO memory from which a written analog signal can be accurately read by eliminating errors in the analog signal between the write operation and the read operation. Prior to the read operation for reading the analog signal from a memory cell through a memory bus, a reset operation for setting the memory bus at a predetermined potential is conducted so as to remove a charge stored in a parasitic capacitance of the memory bus. The input terminal of a read circuit is set at a predetermined potential, with a write circuit disconnected from the memory bus by using an input circuit and with the read circuit connected with the memory bus by using an output circuit. In this manner, the memory bus is set at the predetermined potential, and the charge stored in the parasitic capacitance is discharged. At this point, a switch in each memory cell is in an off-state, and hence, a charge corresponding to the analog signal can be retained in the memory cell.

REFERENCES:
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patent: 4970703 (1990-11-01), Hariharan et al.
patent: 5365485 (1994-11-01), Ward et al.
K. A. Nishimura et al., "A Monolithgic Analog Video Comb Filter in 1.2-.mu.m CMOS", IEEE Journal of Solid-State Circuit, vol. 28, No. 12, Dec. 1993, pp. 1331-1339.
IEEE International Solid State Circuits Conference, vol. 36, 1 Feb. 1993, pp. 30-31, 257, XP000388013 Nishimura, et al. "A Monolithic Analog Video Comb Filter in 1.2.mu.m CMOS" (whole document).
IEEE Transactions on Nuclear Science, vol. 37, No. 3-01, 1 Jun. 1990, pp. 1230-1236, XP000143133 Kleinfelder, SA "A 4096 Cell Switched Capacitor Analog Waveform Storage Integrated Circuit" p. 1231, paragraph II; fig. 1,2.

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