Horology: time measuring systems or devices – Electrical time base – Solid state oscillating circuit type
Reexamination Certificate
1999-02-09
2001-01-09
Roskoski, Bernard (Department: 2859)
Horology: time measuring systems or devices
Electrical time base
Solid state oscillating circuit type
C368S160000, C318S696000
Reexamination Certificate
active
06172942
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The Present invention relates to an analog electronic watch including a microcomputer. Particularly, the present invention relates to an analog electronic watch in which low consumption motor driving is controlled by a microcomputer.
2. Description of the Prior Art
Conventionally, in an analog electronic watch, in order to suppress consumed electric current of a motor, the width of a rectangular pulse is made variable or the duty of a chopping pulse is made variable as disclosed in Japanese Patent Unexamined Publication No. Sho. 54-101367, so that the motor is driven by minimal driving pulses. It is known that according to the chopping pulse, pulses are applied intermittently to a motor, so that the peak current of the motor is lowered as compared with the rectangular pulse.
However, in a conventional analog electronic watch, if the duty of the chopping pulse is raised by one rank, in the case of a base oscillation of 32 kHz, the pulse On-time is increased by multiplying 31 &mgr;s by the number of chopping pulses, and further, the Off-time of the chopping pulse becomes narrow, so that the peak current is also raised and rather a large current loss is caused. Moreover, in order to make the duty more finely variable, an ineffective method, such as a method of forming a clock faster than a base oscillation by using a frequency multiplying circuit, has been performed.
SUMMARY OF THE INVENTION
In order to solve the above problems, a first aspect of the present invention is made of such a structure as comprises an oscillation circuit, a frequency dividing circuit for dividing an output of the oscillation circuit, a system clock generating circuit for generating a system clock from an output of the oscillation circuit, a ROM in which procedures, such as a clocking operation of a watch, are programmed, a CPU for decoding data programmed in the ROM and for performing various arithmetic processes, a RAM for storing various data, an interrupt signal generating circuit for generating an interrupt signal to the CPU, a chopping pulse generating circuit which receives a timing signal from the frequency dividing circuit and causes a duty of a chopping pulse to be variable, a one-shot pulse generating circuit which receives an end signal of a motor driving pulse outputted from the chopping pulse generating circuit and a timing signal from the frequency dividing circuit, and outputs a one-shot pulse, a pulse rank storage circuit for storing pulse states of the chopping pulse generating circuit and the one-shot pulse generating circuit, a motor driver circuit which receives outputs of the chopping pulse generating circuit and the one-shot pulse generating circuit and drives a motor, a motor driven by the motor driver circuit, and a rotation detecting circuit for detecting rotation
on-rotation of the motor.
A second aspect of the present invention is made of such a structure as comprises the one-shot pulse generating circuit which receives a timing signal from the frequency dividing circuit and outputs a one-shot pulse, and the chopping pulse generating circuit which receives an end signal of a motor driving pulse outputted from the one-shot pulse generating circuit and a timing signal from the frequency dividing circuit, and causes the duty of the chopping pulse to be variable.
REFERENCES:
patent: 4271773 (1981-06-01), makabe et al.
patent: 4302828 (1981-11-01), Morokawa et al.
patent: 4302829 (1981-11-01), Morokawa et al.
patent: 5028857 (1991-07-01), Taghezout
Hanzaki Teruaki
Ogasawara Kenji
Adams & Wilks
Roskoski Bernard
Seiko Instruments Inc.
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