Analog duty cycle correction loop for clocks

Details Analog duty cycle correction loop for clocks Analog duty cycle correction loop for clocks

2011-03-01

2011-03-01

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S176000

Reexamination Certificate

active

07898309

ABSTRACT:
Providing duty cycle correction can include determining whether a clock signal has a duty cycle greater than 50% based on averaging the clock signal and comparing that averaged clock signal to ½ VDD. When the duty cycle is greater than 50%, the clock signal can be selected. When the duty cycle is less than 50%, the inverted clock signal can be selected. Thus, a duty cycle corrected clock signal can be generated based on the clock signal or the inverted clock signal. Notably, a duty cycle control signal can be adjusted based on comparisons of an averaged, duty cycle corrected clock signal and predetermined low/high voltage ranges. Components performing comparing functions can be strobed based on a count performed on the clock signal.

REFERENCES:
patent: 5757218 (1998-05-01), Blum
patent: 7180346 (2007-02-01), Lee
patent: 7368966 (2008-05-01), Hur
patent: 2009/0322390 (2009-12-01), Shim

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