Analog/digital converter with tree-structured folding circuit

Details Analog/digital converter with tree-structured folding circuit Analog/digital converter with tree-structured folding circuit

2000-03-17

2001-05-22

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S156000

Reexamination Certificate

active

06236348

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to analogue/digital converters, that is to say electronic circuits capable of converting an analogue input signal into an accurate digital value representing the amplitude of the analogue signal. The numerical value is obtained in the form of a word of several bits, coded in pure binary or in some other code.
2. Discussion of the Background
Several conversion processes exist, and the choice of one process rather than another depends on the performance expected of the converter. The most important parameters of this performance are:
resolution, defined by the number of bits of the output word representing with precision the amplitude of the analogue signal; the number of bits can be from 16 to 18, or even 20, for the most accurate converters, and the accuracy is generally plus or minus ½ of a lowest-order bit;
speed, that is to say the number of conversion operations which can be performed in one second;
power consumption: a fast and accurate converter consumes much more energy than a slow and inaccurate converter; now, the power consumption causes heating of the integrated circuit chip on which the converter is made. This heating must be compensated for by means of cooling which make the circuit difficult to use when there are bulkiness constraints to be complied with. Moreover, with the proliferation of so-called “portable” equipment (those which operate with the aid of batteries), the “high power consumption” criterion also becomes synonymous with “low lifetime of the equipment”;
and of course the design and fabrication cost of the converter related in particular to the area of the integrated circuit chip used by the converter.
The qualities of an analogue/digital converter result from a compromise between the above parameters and an objective of the present invention is to improve this compromise.
Among the known structures of analogue/digital converters may be cited:
successive-approximation converters, operating relatively slowly;
“flash” converters which use 2
N
comparators in parallel, of bulky structure and consuming high power;
interpolation converters, with series structure (several cascaded stages) or parallel structure;
signal-folding converters.
SUMMARY OF THE INVENTION
The invention is addressed at this latter category of converter, which may moreover be associated with other categories in mixed converters.
The role of a signal folding circuit is to produce at least two so-called “folded” voltages: these are analogue voltages which vary substantially sinusoidally as a function of the voltage Vin to be converted, and which cross over for several values of Vin which are perfectly determined reference values regularly distributed within a voltage interval where Vin is apt to vary.
The signal folding circuit may have two different functions (and in general it will have both):
it provides information regarding the position of the voltage Vin with respect to the various reference values; this information serves to establish the high-order bits of the analogue/digital conversion,
and, moreover, at its output it provides folded analogue voltages which can be used by series or parallel interpolation circuits to provide lower-order bits improving the resolution of the analogue/digital conversion.
An objective of the present invention is to propose such a signal folding circuit and to incorporate it into an analogue/digital converter architecture. The circuit proposed offers a good compromise between the parameters mentioned hereinabove, and in particular the accuracy and power consumption.
There is therefore proposed an analogue/digital converter which comprises a signal folding circuit comprising:
means for producing n pairs of voltages varying monotonically with Vin, the voltages of a pair of rank k crossing over when Vin has a reference value equal to V
k
and varying linearly around their crossover point, the voltages V
k
being regularly distributed,
at least two current routing circuits, each of which possesses at least three pairs of inputs and at least two outputs called the direct output and the inverse output,
a routing circuit of rank i having the following characteristics:
it receives at least the voltage pairs of rank k−1, k and k+1, the circuits of different rank receiving different sets of voltage pairs,
it comprises a current source supplying a group of branches arranged as a tree-like-like structure with at least two stages, the last of which comprises at least four branches, each branch of a stage supplying two branches of the next stage, the apportioning of the current in each branchoff being dependent on the voltage pairs of rank k−1, k and k+1, and the direct and inverse outputs of this circuit being tapped respectively from two different branches of the last stage,
the direct outputs of the various routing circuits being linked together so as to add together the currents which flow through them and providing a first folded signal, and the inverse outputs also being linked together and providing a second folded signal complementary to the first.
Information regarding the position of Vin with respect to the reference voltages is obtained by combining the currents emanating from the branches of the last stage of several different routing circuits, and this information is used to produce high-order bits of the analogue/digital conversion of the signal Vin.
Two main implementations of the invention may be provided for. In a first implementation, the routing circuits have two stages and make it possible to route the current selectively to one of the four branches of the second stage. If one of the routing circuits receives the voltage pairs crossing over for Vin equal to V
k−1
, V
k
, V
k+1
, the current is preferentially routed as a function of the relative position of Vin with respect to these three references. The next circuit receives the voltage pairs crossing over for Vin=V
k+1
, V
k+2
, V
k+3
; there are at least (n−1)/2 routing circuits (possibly one more at one end) if there are n references V
k
.
In another implementation, the routing circuits have three stages and make it possible to route the current preferentially towards one of the eight branches of the third stage as a function of the position of Vin with respect to seven voltage references which are V
k−3
, V
k−2
, V
k−1
, V
k
, V
k+1
, V
k+2
, V
k+3
. The routing circuit receives seven pairs of control voltages crossing over for these reference values. The neighbouring circuit, if there is one, receives the group of next voltages corresponding to the references V
k+3
and the next six. The currents of at least three of the output branches on the one hand, and three other output branches on the other hand are added together to produce the two complementary folded signals.
It would be possible to generalize to any number of stages, by indicating that the signal folding circuit comprises M current routing circuits with tree-like-like structure with Z stages supplied by a current source, with Z at least equal to 2, each routing circuit having 2
Z
−1 pairs of inputs each receiving a voltage pair tapped off from the n pairs, the 2
z
−1 voltage pairs corresponding to 2
z
−1 adjacent references V
k
, the current of the source being routed preferentially into one branch from among 2
z
output branches as a function of the values of the input voltages, and the routing circuit having a direct output obtained by the merging of 2
z
−1 different output branches and an inverse output obtained by the merging of 2
z−1
−1 other output branches, the direct outputs of the various routing circuits being linked together and providing a first folded signal, and the inverse outputs also being linked together and providing a second folded signal. It should be noted that in the case where there are at least three stages in the tree-like-like structures (Z greater than or equal to 3), it is possible t

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