Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1987-08-31
1989-05-09
Shoop, Jr., William M.
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
341155, 341156, H03M 126
Patent
active
048293024
ABSTRACT:
A clock-controlled analog/digital converter operating according to the weighing method includes a sample-and-hold element with an analog input, a comparator having inputs and a successive approximation register having a data output. The sample-and-hold element, the comparator and the successive approximation register being mutually interconnected in series. The successive approximation register includes memory elements for incrementing a defined logical state for each successive weighing step as well as for writing in and storing in memory the particular result of weighing ascertained by the comparator. A digital/analog converter has an input side connected to the data output and an output side connected to one of the inputs of the comparator. A decoder controls the comparator and the successive approximation register and has an input side connected to the data output.
REFERENCES:
patent: 4200863 (1980-04-01), Hodges
patent: 4407020 (1983-09-01), Helliwell et al.
patent: 4460891 (1984-07-01), Bernstein
Article by Jim Williams, EDN, 6/20/85, pp. 115-126.
Research Notes, Int. J. Electronics, 1974, vol. 37, No. 5, pp. 711-713.
Haas Manfred
Oitzl Erich
Greenberg Laurence A.
Lerner Herbert L.
Romaro Gary J.
Shoop Jr. William M.
Siemens Aktiengesellschaft
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