Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
1999-01-26
2001-05-22
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S163000
Reexamination Certificate
active
06236349
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related an analog-digital converter and an analog-digital converting method for outputting the analog-digital conversion codes without undesirable enhanced effect of noise mixed to the input analog signal, and also related to a volume controller system designed with such an analog-digital converter.
2. Prior Art
FIGS.
1
(
a
) and
1
(
b
) are schematic diagrams showing a prior art analog-digital converter with the resolution of 3 bits in which FIG.
1
(
a
) is a view showing the overall configuration thereof while FIG.
1
(
b
) is a view showing the circuit diagram of the analog switch.
The analog-digital converter is composed of a conversion level output circuit
101
, a decoder (3 to 8)
102
, the comparator
103
, a resettable D-type flip-flop
104
, the 3-bit serial-in-parallel-out (SIPO) register
105
, the 3-bit parallel-in-parallel-out (PIPO) register
106
and the clock signal generator
107
, as illustrated in FIG.
1
(
a
).
The conversion level output circuit
101
is composed of a plurality of resistors connected in serial between a power source line VDD and the ground GND for generating the conversion potential levels respectively corresponding to the analog-digital conversion codes of [111] to [000], and a series of analog switches SW
111
to SW
001
connected to the connection points of the series of resistors.
For example, the analog switches SW
001
~SW
111
are composed of a Pch-MOS transistor
111
, an Nch-MOS transistor
112
and an inverter
113
as illustrated in FIG.
1
(
b
), and turned on/off in accordance with the potential levels of the clock signal CK
1
to CK
3
, as illustrated in
FIG. 2
, under the control of the decoder
102
.
FIG. 3
is a timing chart showing the operation of the analog-digital converter.
In accordance with the operation of the analog-digital converter, one of the analog switches SW
111
to SW
001
is turned on in sequence, the output voltage thereof and the signal level INPUT of the analog signal as inputted are compared with each other by means of the comparator
103
.
When the conversion potential level as outputted from the conversion level output circuit
101
becomes lower than the signal level INPUT of the analog signal as inputted, the comparison output level CO of the comparator
103
rises to the “H” level.
The output signal COD of the D-type flip-flops
104
rises then to the “H” level, followed by the three-bit output signal of the register
105
being [010]. The above data [010] are transferred to the register
106
in a “L” to “H” timing of the LD signal, and the analog-digital conversion code [010] is outputted as the output signal OUTPUT of the analog-digital converter.
The analog-digital converting operation is repeated followed by outputting the analog-digital conversion code [001] as the output signal OUTPUT of the analog-digital converter.
Next, a volume controller system designed with the analog-digital converter as described above will be explained in the followings.
FIG. 4
is a schematic diagram showing such a system.
The volume controller system is provided with the analog-digital converter
120
as illustrated in
FIG. 1
for the purpose of controlling a digital volume controller
122
by the digitized signal converted from the DC potential outputted by the external volume controller
121
. The conversion is performed by the analog-digital converter
120
.
For example, the analog-digital converter
120
and the digital volume controller
122
are integrated in an audio controlling IC chip while the volume controller
121
is provided external to the IC chip.
FIG. 5
is an exemplary circuit diagram showing the digital volume controller
122
. In this case, the digital volume controller
122
is an 8-level volume controller composed of the decoder (3 bits to 8 levels) and an output voltage generation circuit
122
b.
The relationship between the three-bit input data INPUT (A,B,C) and the three-bit output data OUTPUT is illustrated in FIG.
6
. On the other hand, the output voltage generation circuit
122
b
is composed of a plurality of resistors “r” and a plurality of switches SW
0
to SW
7
.
The 8-level volume controller
122
can be controlled by three-bit data, for which the analog-digital converter as illustrated in
FIG. 1
can be used for implementing the volume controller system as illustrated in FIG.
4
.
In the case of the volume controller system, when the input level (4V) as illustrated in
FIG. 7
, the analog-digital conversion code [110] is outputted from the analog-digital converter
120
. The output signal S
3
of the decoder
122
as illustrated in
FIG. 5
becomes “H” with the switch SW
3
being turned on. As a result, the signal inputted to the IN terminal is attenuated to 4/7 and outputted to the OUT terminal.
However, there are following shortcomings in the prior art analog-digital converter.
As illustrated in
FIG. 7
, in the case that the input level B (2.5V) is inputted as the DC potential, the analog-digital conversion code may often fluctuate between the analog-digital conversion codes [011] and [100], because the input level is between the adjacent conversion regions.
More specifically explained, as illustrated in FIG.
8
(
a
), the signal input to the analog-digital converter
120
is necessarily mixed with noise so that, when a signal is input in the vicinity of the boundary, the analog-digital conversion code as output necessarily fluctuates in accordance with the fluctuation of the noise.
For example, when noise as mixed has a triangle wave form P
11
as illustrated in FIG.
8
(
b
), the output signal CSD(OUTPUT) of the analog-digital converter
120
periodically fluctuates between the output levels A and B ([011],[100]). As a result, when a continuous audio signal is input to the IN terminal of the digital volume controller
122
, the output signal becomes modulated as treated by amplitude modulation. For this reason, the output sound sometimes becomes deteriorated and discomfortable. While the DC control signal level (the signal level of the analog signal as inputted) not frequently occurs at some of the boundaries, the greater the noise level the greater the probability of occurrence of the shortcomings because the fluctuation range is expanded with greater noise.
Accordingly, in the case of the prior art analog-digital converter, when a signal is input in the vicinity of the boundary, the analog-digital conversion code as output fluctuates due to the noise mixed to the input analog signal.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve the shortcomings as described above. It is an important object of the present invention to provide an analog-digital converter and an analog-digital converting method for outputting the analog-digital conversion codes without undesirable enhanced affect of noise mixed to the input analog signal.
It is another associated object of the present invention to provide a volume controller system with such an analog-digital converting method for outputting the analog-digital conversion codes without undesirable enhanced affect of noise mixed to the input analog signal.
In brief, the above and other objects and advantages of the present invention are provided by a new and improved analog-digital converter comprising: an analog conversion level generating circuit for generating a plurality of analog conversion levels corresponding to respective codes of digitized signals; a comparator for comparing an analog signal as inputted with at least one of the analog conversion levels; and an analog-digital conversion code generating circuit for periodically outputting one of the digitized signals as an analog-digital conversion code corresponding to the analog signal as inputted. Particularly, an ignoring region is provided between adjacent analog conversion levels and, the analog-digital conversion code generating circuit outputs the anal
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Wamsley Patrick
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