Analog-digital converter

Communications: electrical – Audible indication – Percussion-type sound producer

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Details

324 76A, 324 49D, 340347M, 340347SH, H03M 144

Patent

active

046911901

ABSTRACT:
An A-D converter for providing the general successive rectification algorithm V.sub.out =2.vertline.V.sub.in .vertline.-V.sub.ref is disclosed. One stage of a synchronous parallel converter generally comprises a comparator, and an op amp with V.sub.in as an input to its inverting input, the noninverting input connected to ground, and the output being V.sub.out, with a first capacitor bridging the inputs of the op amp, and a second capacitor of half the capacitance of the first capacitor feeding back from the output of the op amp to its noninverting input. The location and capacitance values of the first and second capacitors perform the amplification function. Switches between the first capacitor and the op amp provide rectification, while a third capacitor between V.sub.ref and the inverting input of the op amp provides the function of subtracting V.sub.ref. Stages are cascaded such that V.sub.out of one stage is the V.sub.in of the next stage. Each stage's V.sub.in is compared to ground to provide a bit of information. A shift register having a storage capacity of m bits is associated with each stage where m is the number of the particular stage.

REFERENCES:
patent: 3541446 (1970-11-01), Prozeller
patent: 3579231 (1971-05-01), Bylanski
The Engineering Staff of Analog Devices, Inc., Analog-Digital Conversion Handbook, 6/1972, pp. II-12 to II-17.

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