Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2005-05-24
2005-05-24
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C348S245000, C341S172000, C341S141000
Reexamination Certificate
active
06897800
ABSTRACT:
The analog demultiplexer (FIG.6) includes an input amplifier (A1), and output amplifiers (AMP1-AMPN). The output and inverting (−) input of amplifiers (AMP1-AMPN) are connected by a respective capacitor (C1-CN). Switches (S1a, S1b, etc.) connect the output of amplifier (A1) to the inverting input of one of (AMP1-AMPN). Switches (S2a, S2b, etc.) connect the output of one of (AMP1-AMPN) to the non-inverting input of the amplifier A1. Switches (S2a, S2b, etc.) and (S1a, S1b, etc.) open and close together in pairs. With feedback from the output of (AMP1-AMPN) through (A1), the gain and any offset of (AMP1-AMPN) is divided down by the gain of (A1). Amplifier (A1) has capacitors (CS1and CS2) connected to its inputs. Switch (S50) connects the inverting input of amplifier (A1) to its output, and switch (S40) connects the non-inverting input of (A1) to a voltage reference (VREF) matching (VREF) applied to (AMP2). Switches (S30) and (S35) connect (CS1) and (CS2) to the demultiplexer input (2). In operation, switches (S40, S50, S30and S35) are initially closed, while switches (S2a, S2b, etc.) are open to charge both capacitors (CS1) and (CS2) and the inputs and output of (A1) to (VREF). Switch (S50) provides feedback to divide down gain errors and offset of (A1). Switches (S30, S35, S40and S50) are then open, while one of switches (S2a, S2b, etc.) is closed with one switch (S1a, S1b, etc) to drive one of the output voltages (VOUT1-VOUTN). With inputs and outputs of (A1) and the connected (AMP1-AMPN) initially be at (VREF), very little settling time is needed.
REFERENCES:
patent: 3619511 (1971-11-01), Ishikawa
patent: 4034376 (1977-07-01), Barton
patent: 4155263 (1979-05-01), Frantz
patent: 4455754 (1984-06-01), Benjamin
patent: 4734775 (1988-03-01), Blom
patent: 4860354 (1989-08-01), van Roermund
patent: 5646538 (1997-07-01), Lide et al.
Elantec Semiconductor Inc.
Fliesler & Meyer LLP
Jeanglaude Jean Bruner
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