Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
2001-06-27
2004-02-03
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S101000, C345S204000, C345S212000, C345S213000, C345S098000
Reexamination Certificate
active
06686913
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to analog drive circuitry, and more particularly to analog drive conditioning for imagers for a display.
2. Description of the Related Art
A conventional video monitor typically includes a display, a display controller, imagers, and drive circuitry. The display controller gathers video information from a host system (e.g., a computer) connected to the monitor and sends the video information to the drive circuitry for writing to the display. The drive circuitry (or driver) is essentially an interface circuit for passing video information from a host system to the imagers. In the context of a monitor, an imager or light valve is basically a light transducer device for converting electrical energy containing light intensity modulation information to light energy emitted to the display. An imager typically either transmits or reflects the light energy for visualization by a user.
Analog imagers have been driven by analog drive circuitry. Conventional analog drive circuitry has typically provided a positive gain stage and a negative gain stage. Such circuitry has alternated between a positive gain mode and a negative gain mode. This is typically accomplished by selectively disabling and enabling the positive gain stage and the negative gain stage. During a positive gain mode, the positive gain stage is enabled and a negative gain stage is disabled. The resulting bias voltage signal is a voltage signal having a positive offset from an arbitrary reference voltage signal. During a negative gain mode, the negative gain stage is enabled and the positive gain stage is disabled. The resulting bias voltage signal is a voltage signal having a negative offset from the arbitrary reference voltage signal. The goal has been to match the amplitude of the positive offset of the bias voltage signal from the arbitrary reference voltage signal during a positive gain mode with the amplitude of the negative offset of the bias voltage signal from the arbitrary reference signal during a negative gain mode.
One disadvantage of such analog drive circuitry is that the positive gain stage and negative gain stage have been in separate gain paths. This has presented a difficulty in matching the two gain paths. Another disadvantage of conventional analog drive circuitry has been the need to make adjustments in a gain path.
One conventional low speed analog drive circuitry implementation has been to wire OR the positive gain stage and the negative gain stage. This wire OR approach has involved switching transients and other undesirable effects. Another limitation of conventional analog drive circuitry has been that only certain types of non-standard gain sources may be utilized.
SUMMARY OF THE INVENTION
Briefly, in accordance with the present invention, a monitor provides analog conditioning circuitry for supplying a symmetrical high speed analog output signal generated from inverted and non-inverted digital data to imagers for a display of the monitor. The circuitry includes an upper bias amplifier for generating a precision upper DC offset signal, a lower bias amplifier for generating a precision lower DC offset signal, a switch for alternating selection of a precision DC offset signal with each frame, and a summing amplifier for adding the selected precision DC offset signal to a high speed analog signal provided by a digital-to-analog converter. Selection of the precision DC offset signal is controlled by an inversion signal provided to the switch from an inversion bit of a display controller. The digital data inversion is controlled by inversion circuitry within the display controller. The analog conditioning circuitry thus provides a single gain path and also provides low speed signal paths decoupled from a high speed signal path.
REFERENCES:
patent: 5739816 (1998-04-01), Kobayashi et al.
patent: 5754156 (1998-05-01), Erhart et al.
patent: 5757298 (1998-05-01), Manley et al.
patent: 5805150 (1998-09-01), Nishino et al.
patent: 6300945 (2001-10-01), Engler et al.
Analog Devices, Inc., “Low Cost, High Speed Rail-to-Rail Amplifiers, AD8051/AD8052/AD8054,” 1997, pp. 1-16, REV. 0.
Analog Devices, Inc., “1-/2-/4-Channel Digital Potentiometers, AD8400/AD8402/AD8403,” 1997, pp. 1-20, REV. B.
Engler David W.
Welker Mark W.
Duke University
Fleshner & Kim LLP
Hjerpe Richard
Zamani Ali
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