Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2002-03-15
2004-10-05
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S104000
Reexamination Certificate
active
06801186
ABSTRACT:
REFERENCES TO RELATED APPLICATIONS
This application claims benefit of Korean Patent Application No. P2000-46579, filed on Aug. 11, 2000, the entirety of which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a liquid crystal display device, and more particularly to an analog buffer and a driving method thereof that requires low power consumption in driving a data line of the liquid crystal display and is insensitive to a deviation of device parameters to have a minor error between an input voltage and an output voltage.
2. Description of the Related Art
Nowadays, a display device requires an ability to display a larger amount of information in conformity to the development into an intelligent society. In addition to this trend, the display device also needs to have high resolution, small thickness, light weight and low power consumption. Research has been actively conducted to meet these requirements.
Generally, a liquid crystal display (LCD) controls light transmissivities of liquid crystal cells in response to a video signal to thereby display a picture. An active matrix LCD provided with a switching device for each liquid crystal cell is suitable for displaying a moving picture. The active matrix LCD mainly uses a thin film transistor (TFT) as the switching device.
The active matrix LCD displays a picture corresponding to video signals, such as television signals, on a picture element or pixel matrix having pixels arranged at each intersection between gate lines and data lines. Each pixel includes a liquid crystal cell controlling a transmitted light quantity in accordance with a voltage level of a data signal from the data line. A TFT is arranged at each intersection between the gate lines and the data lines to switch a data signal delivered into the liquid crystal cell in response to a scanning signal (i.e., a gate signal) from the gate line.
FIG.
1
A and
FIG. 1B
show structures of an amorphous silicon thin film transistor LCD and a poly-crystalline silicon thin film transistor LCD, respectively.
Referring to
FIG. 1A
, the amorphous silicon thin film transistor (a-Si TFT) LCD includes a TFT array
3
provided on a substrate
1
, a data driver
6
and a gate driver
8
for driving the TFT array
3
, and a printed circuit board (PCB)
4
for connecting the TFT array
3
to the data and gate drivers
6
and
8
. The a-Si TFT LCD has a low electric field mobility and thus has the drivers
6
and
8
provided at the exterior thereof.
On the other hand, a poly-crystalline silicon thin film transistor (poly-Si TFT) LCD as shown in
FIG. 1B
includes a TFT array
5
provided on a substrate
2
, and a data driver
7
and a gate driver
9
for driving the TFT array
5
. In the poly-Si TFT LCD, driving circuits such as the data driver
7
and the gate driver
9
are mounted in the panel to largely reduce the number of signal lines connected to the exterior thereof, so that a product responsibility can be improved to largely reduce a manufacturing cost. Also, a poly-Si TFT having a smaller size than an a-Si TFT is used as a pixel switch owing to a high electric field mobility, to thereby obtain a high aperture ratio easily. Accordingly, research on the poly-Si TFT LCD has been actively conducted.
The poly-Si TFT LCD has a most significant advantage over the a-Si TFT LCD in that it can mount a CMOS circuit onto a cheap large-size glass substrate. Accordingly, with the poly-Si TFT LCD, it is possible to form on the same glass substrate the driving circuits such as the data driver
6
and the gate driver
7
, which are provided at the exterior thereof in the case of an a-Si TFT LCD. If the performance of the poly-Si TFT is improved continuously, then the poly-Si TFT LCD can have an increased circuit density and dimension, so that a central processing unit (CPU) and various sensors can be integrated to make a future ideal display device. However, although such an expectation can be realized only on a large-scale screen, the poly-Si TFT LCD has thus far only been applied to a medium/small-scale screen for a viewer of a digital camera or a projector, due to problems in the circuit performance according to device characteristics and fabrication technique. In the mean time, the poly-Si TFT LCD trends toward a large-scale screen and an improved performance, e.g., a 10.4″ XGA low-temperature poly-Si TFT LCD made by Toshiba corp. and a 12.1″ XGA low-temperature poly-Si TFT LCD made by LG PHILIPS LCD corp.
If the performance of such a poly-Si TFT is improved to increase an operation speed of the circuit, then it is essential to implement an analog buffer capable of driving the data lines on the panel. Although a typical single-crystalline silicon circuit has used an operational amplifier as the analog buffer, employing an operational amplifier for a poly-Si TFT having a large characteristic variation has a problem in that it has a large offset voltage and a large power consumption caused by a normal current due to its difficult matching characteristic. For this reason, it becomes difficult to use an operational amplifier as the analog buffer for the poly-Si TFT. This requires an analog buffer that is insensitive to a characteristic variation of the poly-Si TFT and has a simple structure to reduce the occupied area and power consumption. To use an analog buffer in which an N-channel poly-Si TFT is connected to a P-channel poly-Si TFT in a push-pull configuration, instead of the operational amplifier, forces an output voltage to generate a direct current voltage error corresponding to a threshold voltage. An analog buffer suggested for the purpose of overcoming such a direct current voltage error is as shown in FIG.
2
.
FIG. 2
is a circuit diagram of a conventional analog buffer with a capacitance capable of eliminating a direct current voltage error, and
FIG. 3
is a driving waveform diagram for explaining an operation of the analog buffer shown in FIG.
2
.
Referring to FIG.
2
and
FIG. 3
, the analog buffer includes: a first node P
1
receiving an externally applied input voltage; first and third switches SW
1
and SW
3
connected to the first node P
1
to control the input voltage Vin; a second node P
2
connected to the first switch SW
1
; a third node P
3
connected to the third switch SW
3
; a capacitor Cvt connected between the second node P
2
and the third node P
3
to charge a desired voltage; a second switch SW
2
for conducting a desired voltage charged in the capacitor Cvt into a buffer; a fourth node P
4
connected to the second switch SW
2
; and an N-channel poly-Si TFT T
1
and a P-channel poly-Si TFT T
2
connected between the second node P
2
and the fourth node P
4
. In this case, the N-channel poly-Si TFT T
1
is connected to the P-channel poly-Si TFT in a push-pull configuration.
The driving operation of such an analog buffer can be divided into three cases, depending on a range of the input voltage applied to the first node P
1
.
The first case is when the input voltage Vin is larger than the sum of the output voltage Vout and the threshold voltage Vtn of the N-channel poly-Si TFT T
1
.
First, in an initialization interval of the analog buffer, the first switch SW
1
and the second switch SW
2
are closed at the same time while the third switch SW
3
is open. An input voltage Vin applied to the first node P
1
is applied, via the closed first and second switches SW
1
and SW
2
, to gate electrodes of the N-channel poly-Si TFT T
1
and the P-channel poly-Si TFT T
2
and the capacitor Cvt. By the input voltage Vin applied to the gate electrodes of the N-channel poly-Si TFT T
1
and the P-channel poly-Si TFT T
2
and the capacitor Cvt, the N-channel poly-Si TFT T
1
is turned on while the P-channel poly-Si TFT T
2
is not turned on. Upon turning-on the N-channel poly-Si TFT T
1
, an output voltage Vout, corresponding to the input voltage Vin, reduced by Vtp (the threshold voltage of the N-channel poly-Si TFT T
1
) is output to the fourth node P
Chung Hoon Ju
Han Chul Hi
Kim Mi Hee
Kim Mi Hee
Shankar Vijay
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