Analog autonomous test bus framework for testing integrated circ

Details Analog autonomous test bus framework for testing integrated circ Analog autonomous test bus framework for testing integrated circ

1995-05-23

1998-01-06

Nguyen, Vinh P.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324 731, 371 225, G01R 3128

Patent

active

057059250

ABSTRACT:
To improve testability of analog or mixed analog/digital circuit modules mounted on a carrier, three-way switches are placed at input and output ports of the circuit modules. The switches can operate to establish signal connections between a test bus and core circuits inside the modules. The switches can also establish signal connections between the test bus and glue circuits disposed between the modules.

REFERENCES:
patent: 4791358 (1988-12-01), Sauerwald et al.
patent: 4879717 (1989-11-01), Sauerwald et al.
patent: 4918379 (1990-04-01), Jongepier
patent: 5107208 (1992-04-01), Lee
patent: 5214655 (1993-05-01), Eichelberger et al.
IEEE Standard 1149. Jan. 1990.
Freeman, "Testing Large Analog/Digital Signal Processing Chips", IEEE Transactions on Consumer Electronics, vol. 36, No. 4, Nov. 1990, pp. 813-818.
E.J. McCluskey et al., "Design for Autonomous Test", IEEE Transactions on Computers, vol. C-30, No. 11, pp.886-875, Nov. 1981.
K.D. Wagner et al., "Design for Testability for Mixed Signal Integrated Circuits", Proceedings of the IEEE 1988 International Test Conference, paper 39.1, pp. 823-828, 1988 (Month Unavailable).
P. Fasang et al., "Design for Testability for Mixed Analog/Digital ASICs", Proceedings of the IEEE 1988 Custom Integrated Circuits Conference, pp. 16.5.1-16.5.4, 1988 (Month Unavailable).
N-C Lee, "Autonomous Test Scheme for Analog ASICs", Proceedings: The Third Annual IEEE ASIC Seminar and Exhibit, Sep. 17-21, 1990, pp. P8-3.1-P8-3.5.
K.T. Kornegay et al., "A Test Controller Board for TSS", Proceedings: First Great Lakes Symposium on VLSI, pp. 38-42; IEEE 1991 (Month Unavailable).
S. Freeman, "A Test Strategy for a Bit-Serial VLSI Chip with Analog IO", Proceedings of the IEEE 1990 Custom Integrated Circuits Conference, May 13-16, 1990, pp. 28.71-28.7.5.
Goodenough, "Build Mixed-Signal ASICs without Analog Cells", Electronic Design, pp. 163-165, Sep. 12, 1991.
Hulse et al., "Panel: P1149.4 Mixed-Signal Test Bus Framework Proposal", International Test Conference 1992 Proceedings, Paper 29.1-29.3, Sep. 1992.
"Structure and Metrology for an Analog Testability Bus", by K.P. Parker et al, Proceedings International Test Converence, 1993, Jan. 1, 1993, pp. 309-322.
"A Hierarchical Analog Test Bus Framework for Testing Mixed-Signal Intergrated Circuits and Printed Circuit Boards", by N.C. Lee, Journal of Electronic Testing, 1993, pp. 361-368 (Month Unavailable).

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