Analog arithmetic circuit that can perform multiplication divisi

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364841, 364602, 364606, G06G 716

Patent

active

051503247

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to an analog arithmetic circuit, and more particularly to an analog arithmetic circuit adapted to execute arithmetic operations such as multiplications, additions, divisions, compressions and expansions, as well as combinations thereof.


BACKGROUND ART

In some conventional analog multipliers, a multiplication is executed, for instance, by adding logarithmic functions represented by the equation I.apprxeq.Is.multidot.e.sup.KV that expresses the relationship between the current I and the voltage V at a PN junction (where I=the current flowing through the PN junction; Is=a saturation current; V=a voltage across the PN junction; and K=a constant).
However, the voltage V across the PN junction in the conduction state is on the order of about 0.6 V, and hence, the magnitude of an analog input signal is limited. As a result, it has been impossible to execute a multiplication of analog signals each having a large amplitude. Furthermore, in this type of multiplication, the arithmetic operations are frequently adversely affected by noises so that it cannot be expected to obtain a product with a high degree of accuracy. In addition, it has been difficult to construct this type of analog circuit in the form of an MOS-LSI.
There has been proposed and demonstrated a time-division type multiplier (for instance, as disclosed in the Japanese Patent Application Laying Open No. 55-82375), in which a first input voltage Ex and its inverted voltage -Ex are alternately switched on, and the duty ratio of the switching is subjected to the pulse-width modulation by a second input voltage Ey. After that, the pulse-width modulated outputs are averaged, thereby obtaining the output Ex.times.Ey.
In this circuit, however, the pulse-width modulated output is obtained as a level ratio between an analog input signal Ey and a triangle waveform signal. Consequently, the pulse duration of the output takes an arbitrary value as long as the analog input signal takes an arbitrary value, even if the frequency of the triangle waveform signal is maintained constant. In other words, the pulse duration takes a continuous value. In view of the fact that the duty ratio of the pulse-width modulation circuit varies continuously, a high-speed and high-accuracy analog circuit is required in order to make the duty ratio correctly follow the original signal.
In addition, a triangle generator in a pulse-width modulation circuit must have a high degree of accuracy because the amplitude and frequency of the triangle waveform signal considerably affect the modulation characteristics. This not only makes it difficult to fabricate the generator in the form of an MOS-LSI, but also makes the generator susceptible to noises.
Two types of conventional analog dividers are well known in the art: one is a system utilizing a logarithmic amplifier; and the other is a multiplication-feedback system in which analog multiplier is inserted into the feedback loop of an operational amplifier. However, the former system has the problems that the arithmetic operation speed is slow, and that only the arithmetic operation can be achieved between an operated signal (a signal that represents the entity such as dividend) and an operating signal (a signal that represents the entity such as divisor) of either positive or negative signs. In the case of the latter, since the system has the feedback loop including the multiplier, it tends to oscillate so that a satisfactory degree of stability cannot be achieved.
Two types of conventional analog expansion and compression circuits are well known in the art: a system using a gain control circuit utilizing a nonlinear characteristic of bipolar transistors; and a system using a diode-clamp piecewise linear approximation circuit including a resistor-diode network. In these systems, when they are used as an expansion circuit, the nonlinear element is connected to the input of an amplifier, whereas when they are used as a compression circuit, the nonlinear element is inserted into the feedback loop

REFERENCES:
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patent: 4439756 (1984-03-01), Shenoi et al.
patent: 4509037 (1985-04-01), Harris
patent: 4588981 (1986-05-01), Senn
patent: 4866442 (1989-09-01), Steim et al.
patent: 4939516 (1990-07-01), Early
Yoneda et al., "Switched-Capacitor Non-Recursive Lowpass Filter," Int. J. Electronics, 1986, vol. 60, No. 3, pp. 395-401.
Blesser et al., "A New Approach to Dynamic Range Compression for Audio Systems", Audio Engineering Society, 35th Convention, Preprint No. 602 (K-10), Oct. 1968.
Bradinal et al., "A High-Performance CMOS stereo ADS and DAC Chip-Set for Digital Audio," IEEE International Conference on Consumer Electronics, Jun. 1987, pp. 48-49.

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