Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2000-09-15
2002-06-11
Jeanpierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S155000
Reexamination Certificate
active
06404368
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a circuit for converting an analog signal into a digital signal, and more particularly to a &Dgr;&Sgr; modulator used in an analog-digital converting circuit which is of both an over-sampling type and a &Dgr;&Sgr; modulation type (or a noise-shaping type).
2. Description of the Related Art
A circuit for converting an analog signal into a digital signal which circuit is of both an over-sampling type and a &Dgr;&Sgr; modulation type has been conventionally used for digitizing a low frequency signal having a frequency of 22.1 kHz or smaller, such as an audio signal. In recent years, such an analog-digital converting circuit has been required to have a wider bandwidth with a high accuracy in order to be able to be applied to a modem used for cable communication, such as xDSL (Digital Scriber Line).
In order to meet such requirement, it would be necessary to keep high accuracy in a low over-sampling ratio. Hence, there is generally used a high-order &Dgr;&Sgr; modulator. Such a high-order &Dgr;&Sgr; modulator is suggested, for instance, in Japanese Unexamined Patent Publications Nos. 7-143006, 10-84282 and 11-17549.
An example of such a high-order &Dgr;&Sgr; modulator is illustrated in FIG.
1
.
The illustrated &Dgr;&Sgr; modulator is comprised of a local digital-analog converter
61
which converts a feed-back signal into an analog signal, a plurality of analog adders
62
each of which calculates a difference between an output signal transmitted from the local digital-analog converter
61
and an analog input signal
60
a
or an output signal transmitted from an analog integrator disposed immediately upstream thereof, a plurality of analog integrators
63
each of which integrates an output signal transmitted from each of the analog adders
62
, a quantizer
64
which converts an output signal transmitted from the final stage analog integrator
63
, into a digital signal
60
b
, and a delay element
65
which delays an output signal transmitted from the quantizer
64
to generate a feed-back signal, and transmits the thus generated feed-back signal into the local digital-analog converter
61
.
For instance, Japanese Unexamined Patent Publications Nos. 9-307447 and 3-117034 has suggested using a multi-bit quantizer.
FIG. 2
is a block diagram illustrating a structure of the &Dgr;&Sgr; modulator suggested in those Publications.
With reference to
FIG. 2
, the &Dgr;&Sgr; modulator is comprised of a local digital-analog converter
71
which converts a feed-back signal into an analog signal, a first analog adder
72
which calculates a difference between an output signal transmitted from the local digital-analog converter
71
and an analog input signal
70
a
, a first analog integrator
73
which integrates an output signal transmitted from the first analog adder
72
, a second analog adder
74
which calculates a difference between an output signal transmitted from the first analog integrator
73
and an output signal transmitted from the digital-analog converter
71
, a second analog integrator
75
which integrates an output signal transmitted from the second analog adder
74
, a multi-bit quantizer
76
which converts an output signal transmitted from the second analog integrator
75
, into a digital signal
70
b
, and a delay element
77
which delays an output signal transmitted from the quantizer
76
to generate a feed-back signal, and transmits the thus generated feed-back signal into the local digital-analog converter
71
.
The &Dgr;&Sgr; modulator illustrated in
FIG. 2
is designed to include the multi-bit quantizer
76
for enhancing a judgment level of a quantizer. As a result, it is possible in the &Dgr;&Sgr; modulator to reduce quantize noises generated in a quantizer, and keep conversion accuracy or linearity high with an over-sampling ratio being kept low.
However, the high-order &Dgr;&Sgr; modulator illustrated in
FIG. 1
is accompanied with a problem that the number of analog circuits such as an operational amplifier and analog elements such as a capacitor is increased, resulting in an increase in a circuit area and power consumption.
In particular, an analog circuit and an analog element are more difficult to fabricate in small dimensions than a digital circuit. Hence, an analog circuit and an analog element are accompanied with a problem that an integrated circuit including a lot of analog circuit and element is quite difficult to fabricate in small dimensions.
The &Dgr;&Sgr; modulators suggested in Japanese Unexamined Patent Publications Nos. 9-307447 and 3-117034 are accompanied with a problem that a non-linear error generated in the local multi-bit digital-analog converting circuit
71
illustrated in
FIG. 2
restricts an accuracy in conversion, that is, linearity in the &Dgr;&Sgr; modulator, and hence, the &Dgr;&Sgr; modulators are likely to be influenced by fluctuation in fabrication dimensions, resulting in that it is quite difficult to have high accuracy.
The local multi-bit digital-analog converting circuit
71
is generally necessary to include analog elements such as capacitors and resistors in the number equal to the number of bits. This means that the local multi-bit digital-analog converting circuit
71
is accompanied also with such a problem as mentioned above.
For instance, a circuit for converting an analog signal to a digital signal, suggested in Japanese Unexamined Patent Publication No. 6-53836, is designed to measure an error in conversion generated in a local digital-analog converting circuit by means of another analog-digital converting circuit, and compensates for the error by the analog-digital converting circuit.
However, the suggested analog-digital converting circuit is accompanied with a problem that the circuit is required to further include an analog-digital converting circuit having high accuracy for compensating for the conversion error, resulting in an increase in size and complexity of the circuit.
Japanese Unexamined Patent Publication No. 9-167967 has suggested an apparatus for converting an analog signal into a digital signal, which apparatus includes an analog-digital converter, a noise shaver converting an output signal transmitted from the analog-digital converter, into a one-bit signal, and suppressing quantize noises in the output signal, and a non-cyclic type digital filter converting a sampling frequency of an output signal transmitted from the noise shaver, and suppressing noises in the output signal.
In order to convert a digital output signal transmitted from the analog-digital converter, into a one-bit signal by means of the noise shaver, the apparatus is designed to include an AND gate as a multiplier for multiplying the digital output signal by a factor in the non-cyclic digital filter.
However, the apparatus is accompanied with a problem that it is unavoidable for the digital filter to be complicated in structure due to the AND gate.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems in the prior &Dgr;&Sgr; modulators, it is an object of the present invention to provide a &Dgr;&Sgr; modulator which is capable of keeping high conversion accuracy or linearity with an over-sampling ratio being kept low, and reducing the number of analog elements.
In one aspect of the present invention, there is provided a &Dgr;&Sgr; modulator including (a) an analog &Dgr;&Sgr; modulator, (b) a digital &Dgr;&Sgr; modulator disposed downstream of the analog &Dgr;&Sgr; modulator and transmitting a one-bit signal, and (c) a delay element which delays the one-bit signal to produce a one-bit feed-back signal, and feeds the thus produced one-bit feed-back signal back to the analog &Dgr;&Sgr; modulator.
It is preferable that the analog &Dgr;&Sgr; modulator includes a multi-bit quantizer.
For instance, the multi-bit quantizer may be comprised of comparators. For instance, the delay element may be comprised of a shift register.
There is further provided a &Dgr;&Sgr; modulator to be used in an over-sampling type analog-digital convertor, including
JeanGlaude Jean Bruner
Jeanpierre Peguy
NEC Corporation
Scully Scott Murphy & Presser
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