Analog acquisition system including a high speed timing generato

Static information storage and retrieval – Analog storage systems

Patent

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Details

365194, 365240, G11C 2704

Patent

active

051445255

ABSTRACT:
An analog acquisition system includes an array of analog capture cells for capturing and storing a signal on an analog bus. Each capture cell in the array may be sequentially selected for sampling the signal at successive sample times. Timing for selecting a row of the analog memory array is provided by a slow shift register and timing for selecting a capture cell within the row of the analog memory array is provided by a fast tapped delay line. Additional circuitry is provided for controlling the delay of the tapped delay line such that total delay is equal to the time the slow shift register takes to transfer from one row to the next.

REFERENCES:
patent: 4271488 (1981-06-01), Saxe

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