Analog accumulator

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364807, G06G 718

Patent

active

047409088

ABSTRACT:
An analog accumulator used in association with a solid state image analyzer for averaging and storing the fixed pattern noise (FPN) includes an N-stage transfer shift register with an input receiving a signal corresponding to the fixed pattern noise and with N outputs, N floating storage diodes each connected to an output of the transfer shift register, N reading parts each connected to a floating storage diode and each comprising a floating input diode connected to the floating storage diode through an injection gate, an injection device and a charge removal drain, and an N-stage transfer shift register with N inputs each connected to a reading part and with an output. The accumulator provides M integrations of N samples of an analog signal and delivers, at the end of the M integrations, the N accumulated samples several times.

REFERENCES:
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patent: 4023019 (1977-05-01), Leibowitz et al.
patent: 4031380 (1977-06-01), Auctaire et al.
patent: 4309760 (1982-01-01), D'Antonio
patent: 4321566 (1982-03-01), Berger et al.
patent: 4379260 (1983-04-01), Labus
patent: 4580227 (1986-04-01), Lavergnat et al.
Barbe et al., "Signal Processing with Charge-Coupled Devices", IEEE Journal of Solid-State Circuits, vol. SC-13, No. 1, Feb. 1978.
"Proceedings of the 5th International Conference on Charge-Coupled Devices" Sep. 1979, pp. 33-39 (edite par J. Mavor, university of Edin . . .

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