Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression
Reexamination Certificate
2003-04-17
2004-11-23
Nguyen, Linh M. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Unwanted signal suppression
C330S085000
Reexamination Certificate
active
06822506
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to the field of electrical filters. More specifically, the present invention relates to filtering or shaping circuits that convert input signals of varying amplitude to timing signals having zero crossings that do not vary in time as the input signal varies in amplitude.
2. Description of the Related Art
It is well known that time pickoff circuits are required to accurately mark the arrival time of input signals for systems utilizing time measurement. One such system is positron emission tomography (PET) where it is necessary to measure the arrival times of signals to determine when signals are in time coincidence. Fundamental to accurately marking the arrival time of input signals is the ability to reject the effects of varying single amplitude and, in some cases, varying single rise-time.
The use of simple level discriminators or comparators results in time pickoff that varies with input signal amplitude, the pickoff occurring earlier on the signal for large signals and later on the signal for smaller signals. The variation in time pickoff is known in the art as time walk. Time walk can be present for signals of varying amplitude, varying rise-time, or varying amplitude and rise-time.
A constant fraction discriminator (CFD) provides time pickoff that is insensitive to varying input signal amplitude and, in some cases, varying input signal rise-time.
FIG. 1
illustrates the original CFD, a delay-line CFD
100
, in which an attenuated version of the input signal is subtracted from a time-delayed version. The delay-line CFD
100
includes a delay line
102
, which is a length of line which defines a particular time delay per unit length, to generate the required internal signal delay and an attenuator
104
. The output of the attenuator
104
is subtracted from the output of the delay line
102
by a differencer
106
. The resulting signal has a zero crossing with a fixed time relationship or delay from the start of the input signal, regardless of the amplitude for fixed-shape input signals. See D. A. Gedcke and W. J. McDonald, “A Constant Fraction of Pulse Height Trigger for Optimum Time Resolution,”
Nucl. Instr. Meth
., vol. 55, pp. 377-380, 1967.
Later, a non-delay-line CFD was reported where a single-pole, high-passed version of the input signal is subtracted from an attenuated version. See C. H. Nowlin, “Amplitude- and Rise-Time-Compensated Filters,” U.S. Pat. No. 4,443,768, Apr. 17, 1984; C. H. Nowlin, “Low-Noise Lumped-Element Timing Filters with Rise-Time Invariant Crossover Times,”
Rev. Sci. Instrum
., vol. 63, pp. 2322-2326, 1992. Following Nowlin, a higher-performing, non-delay-line CFD
200
, illustrated in
FIG. 2
, was reported by the present applicant where the output of the attenuator
104
and the output of a low-pass or all-pass filter
202
are combined at the differencer
106
. See D. M. Binkley, “Amplitude and Rise-Time Insensitive Timing-Shaping Filters,” U.S. Pat. No. 5,396,187, Mar. 7, 1995; D. M. Binkley, “Performance of Non-Delay-Line Constant-Fraction Discriminator Timing Circuits,”
IEEE Trans. Nucl. Sci
., vol. NS 41, no. 4, pp. 1169-1175, August 1994 (describing non-delay-line CFDs in detail). The non-delay-line CFDs, while generally not providing the full performance of the delay-line CFD
100
, have the substantial advantage of permitting fully monolithic integration within a single integrated circuit.
The non-delay-line CFD
200
described in U.S. Pat. No. 5,396,187 was extended when implemented in a 2-&mgr;m complementary metal oxide semiconductor (CMOS) integrated circuit by the addition of gated baseline restorer (BLR) circuit. See J. M. Rochelle, D. M. Binkley, and M. J. Paulus, “Fully Integrated Current-Mode CMOS Gated Baseline Restorer Circuits,”
IEEE Trans. on Nucl. Sci
., vol. 42, no. 4, pp. 729-735, August 1995. The gated BLR circuit cancels baseline dc errors associated with MOS transistor mismatches and changing input signal count rates, but does not provide the pulse tail-cancellation revealed in the present application.
FIG. 3
illustrates a block diagram of the gated BLR CFD
300
, which explicitly seeks to preserved the original shape by only providing correction when a signal is not present. The gated BLR CFD
300
is gated off during the presence of a signal and provides no pulse tail-cancellation. When a signal is not present, the non-delay-line, timing shaping filter output from the shaping filter
302
and the constant fraction comparator
304
is sampled by a transconductor
306
. If the sampled signal is not maintained at signal ground, a voltage is developed across a capacitor
308
. The capacitor voltage, in turn, causes a correction current I
BLR
to appear at the input of the shaping filter
302
such that the sampled signal is maintained at signal ground. The gated BLR CFD
300
explicitly seeks to preserve the original signal shape by only providing correction, or being gated on, when a signal is not present. However, conventional CFD circuits, including the gated BLR CFD
300
, are not adapted to cancel the slow decay tail of the signal. The inability to cancel the pulse-tail makes conventional CFD circuits unsuitable for use in high count rate applications.
While both delay-line and non-delay-line CFDs exist in the prior art, these circuits do not permit operation for input signals operating at a high count rate. For positron emission tomography (PET) and many systems utilizing nuclear radiation detectors, the detector signal decays slowly following its arrival or leading edge. This decay characteristic is known in the art as the decay tail. If the detector signal count rate is high, it is likely new signals will occur on top of the decay tail of previous signals. The occurrence of a new signal on the decay tail of a previous signal is known in the art as pulse pileup and can create significant time pickoff errors for CFD circuits.
Although not known to be applied to CFD circuits, pulse tail-cancellation circuits for narrowing or effectively canceling the long decay tail of detector signals are known in the prior art. When the decay tail is exponential, as is frequently the case for nuclear scintillation detectors, a pole-zero network or filter can be used to cancel the pole associated with the tail decay by placing a zero at the time constant or frequency associated with the decay tail. See R. Boie, A. Hrisoho, and P. Rehak, “Signal Shaping and Tail-cancellation for Gas Proportional Detectors at High Counting Rates,”
IEEE Trans. Nucl. Sci
., vol. 28, pp. 603-609, March 1981. The pole-zero network will necessarily introduce its own pole, but the time constant associated with the decay tail frequency pole can be made shorter than the original decay tail time constant. If the pole-zero network is tuned to the decay tail of the detector pulse, the pulse tail duration can be reduced considerably. Pole-zero tail-cancellation techniques have been reported in bipolar integrated circuits. See N. Dressnandt, N. Lam, F. M. Newcomer, R. Van Berg, and H. H. Williams, “Implementation of the ASDBLR Straw Tube Readout ASIC in DMILL Technology,”
IEEE Trans. Nucl. Sci
., vol. 48, pp. 1239-1243, August 2001; B. Bevensee, F. M. Newcomer, R. Van Berg, and H. H. Williams, “An Amplifier-Shaper-Discriminator with Baseline Restoration for the ATLAS Transition Radiation Tracker,”
IEEE Trans. Nucl. Sci
., vol. 43, pp.1725-1731, June 1996. Other pole-zero tail-cancellation techniques have been applied to CMOS integrated circuits. See A. Kandasamy, E. O'Brien, P. O'Connor, and W. Von Achen, “A Monolithic Preamplifier-Shaper for Measurement of Energy Loss and Transition Radiation,”
IEEE Trans. Nucl. Sci
., vol. 46, pp.150-155, June 1999. These techniques are designed to reduce the long ion decay tail associated with proportional chamber detectors. However, pole-zero tail-cancellation techniques have the disadvantage of requiring tuning or matching to the signal decay time constant.
If the zero of a pole-zero network or filter is placed at the ori
Concorde Microsystems, Inc.
Nguyen Linh M.
Pitts & Brittian P.C.
LandOfFree
Amplitude and rise-time sensitive timing-shaping filters... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Amplitude and rise-time sensitive timing-shaping filters..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Amplitude and rise-time sensitive timing-shaping filters... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3338376