Amplifying apparatus and bias stabilization circuit

Amplifiers – With semiconductor amplifying device – Including plural stages cascaded

Reexamination Certificate

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Details

C330S273000, C330S134000

Reexamination Certificate

active

07629853

ABSTRACT:
An amplifying apparatus including an amplifier having a first FET, a second FET having a source connected to a drain of the first FET, a load resistance connected to a drain of the second FET, a first bias circuit configured to supply a first bias voltage to a gate of the first FET, and a second bias circuit configured to supply a second bias voltage to a gate of the second FET. The second bias circuit includes a second comparison circuit configured to send a control signal to the gate of the second FET so that a bias voltage of a connection node between the first and second FETs changes in conjunction with an output voltage of the first bias circuit.

REFERENCES:
patent: 4521740 (1985-06-01), Nakayama
patent: 5019789 (1991-05-01), Graeme et al.
patent: 6046642 (2000-04-01), Brayton et al.
patent: 6236266 (2001-05-01), Choumei et al.
patent: 6583667 (2003-06-01), Dasgupta et al.
patent: 6680645 (2004-01-01), Greitschus et al.
patent: 7023281 (2006-04-01), Ali
patent: 8-288754 (1996-11-01), None
patent: 9-307369 (1997-11-01), None
patent: 10-41753 (1998-02-01), None
patent: 2002-185288 (2002-06-01), None

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