Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2002-09-16
2004-11-23
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S292000
Reexamination Certificate
active
06822514
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to amplifiers for use as part of a closed loop system such as low dropout voltage regulators, and in particular, to amplifiers for use in such systems using Miller-effect feedback.
2. Description of the Related Art
Closed loop systems, by definition, use various forms of feedback, generally for purposes of stabilization of circuit operation. One example of such a closed loop system is a low dropout voltage regulator (LDO). (The following discussion will be within the context of an LDO, but it should be understood that the principles and advantages of the present invention can be realized and implemented in other forms of closed loop systems as well.) As is well known in the art, an LDO is a closed loop system that provides current to a load at a specific voltage, with such load voltage typically being very close in value to the overall system power supply voltage. Typically such an LDO is a self-contained system that is placed onto a printed circuit board as part of a larger host system, with the LDO generally being a mixture of on-chip and off-chip components.
Referring to
FIG. 1
, for example, the components providing an LDO function will frequently include an integrated circuit, as noted above, mounted on a printed circuit board within a host system (not shown). The integrated circuit will include the on-chip error amplifier TCA (e.g., a transconductance amplifier), along with its reference voltage source and an internal load. External to the integrated circuit and also resident on the printed circuit board, will be a power transistor Q
1
(typically a PNP bipolar junction transistor) and an external filter capacitor. The power transistor Q
1
serves as the regulating circuit element between the main power supply VDD and the regulated power supply voltage source Vreg. The filter capacitor external filters the regulated voltage Vreg, shunting any spurious or noise components to the negative power supply rail VSS (or ground GND). The error amplifier TCA must be able to drive the base terminal of the power transistor Q
1
such that the transistor Q
1
is fully on. Accordingly, this puts some restrictions on the design of the output stage of the error amplifier TCA.
Referring to
FIGS. 2A and 2B
, a typical output stage for the error amplifier TCA is a P-type metal oxide semiconductor field effect transistor (PMOSFET) M
11
. The gate terminal of transistor M
11
is driven by an input voltage Vin and, in turn, the source terminal of transistor M
11
provides the base voltage VB for the base terminal of the power transistor Q
1
. Further in turn, the power transistor Q
1
provides the current for the load Rload across which the regulated output voltage Vreg appears and is filtered by the external filter capacitance which includes a capacitive component Cload and an effective series resistance Resr (discussed in more detail below).
This circuit arrangement is chosen to provide good control of the DC gain from input voltage Vin to intermediate voltage VB, as well as good control over the transfer function pole associated with the base terminal of transistor Q
1
. As indicated in the circuit model of
FIG. 2B
, there are two poles and two zeros in the transfer function for this system. The first pole P
1
and zero Z
1
are associated with the output node where the output voltage Vreg appears, while the second pole P
2
and zero Z
2
are associated with the base terminal of transistor Q
1
.
Pole
1
P
1
is a function of the load capacitance Cload and load resistance Rload. With the load capacitance Cload fixed, this pole P
1
becomes a linear function of the load resistance Rload. Pole
2
is a function of the input capacitance Cpi and resistance Rpi (as components of the input impedance of the transistor Q
1
(in parallel with the output impedance gm*Vgs of source follower transistor M
11
). In accordance with well known transistor principles, this transistor input resistance Rpi and capacitance Cpi are, at least to a first order approximation, linearly dependent on the collector current IC of transistor Q
1
, while the transconductance gm of the PMOS transistor M
11
is square law dependent on the collector current IC (due to its relationship to its base current IB of transistor Q
1
, which is equal to the drain current ID of transistor M
11
). If transistor M
11
is scaled such that the input resistance Rpi of transistor Q
1
is much lower than the inverse of the transconductance of transistor M
11
, then pole P
2
will stay relatively constant over a broad range of load resistance Rload. Further, as a practical matter, the size of transistor M
11
often cannot be so large that it stays in saturation over the entire range of load resistance Rload. Therefore, at load currents below the saturation level, transistor M
11
will behave resistively, thereby keeping the pole P
2
relatively stable.
The voltage gain from the input Vin at the gate terminal of transistor M
11
to the base voltage VB at the base terminal of transistor Q
1
will increase as a function of the transistor Q
1
collector current IC raised to a power of 1.5 when the load current is reduced until transistor M
11
transitions into its linear region of operation, where it will then increase linearly to a maximum of unity. Since the output voltage Vreg will be fixed, the output or load current necessarily has a linear relationship with the load resistance Rload. Accordingly, the voltage gain from the base voltage Vb to the collector, or output, voltage Vreg should remain constant. As a practical matter, however, the emitter resistance of transistor Q
1
, albeit small, will cause the transconductance of transistor Q
1
to degenerate for large collector current IC.
The second zero Z
2
is associated with the feed forward path provided by parasitic capacitance CMU of transistor Q
1
. For low load impedances, this zero Z
2
goes to a very high frequency. The first zero Z
1
is associated with the effective series resistance (RESR) of the load capacitor Cload. This resistance will remain substantially constant. The load resistance Rload is normally assumed to be nominally resistive. With a large load capacitance Cload and low load resistance Rload, the output node produces a high frequency pole. However, under high load resistance Rload, this output node pole becomes significantly lower. Accordingly, the circuit cannot be compensated at the output node because a low frequency dominant pole does not always exist. Similarly, to cover the entire range of possible load resistance values, a very large capacitance Cload would be required to compensate the high impedance node within the error amplifier. Such a large capacitance would require a very large current to slew. However, to produce a high DC gain, the output current must remain low. These two requirements conflict with each other, plus the required capacitor would be too large for a practical design.
A more practical solution has been to use Miller feedback, i.e., a feedback capacitance Cm between the load terminal and internal terminal of the error amplifier. However, it has been shown that traditional Miller feedback can severely degrade the power supply rejection ratio (PSRR) of the circuit. On the other hand, it has also been shown that connecting the Miller feedback capacitance back to a low impedance node of the amplifier rather than connecting it to a high impedance node can provide the same Miller capacitance gain while significantly improving the PSRR.
Referring to
FIG. 3
, one example of an LDO uses a complementary MOSFET (CMOSFET) folded cascode amplifier stage (P-MOSFETs M
1
, M
2
, M
7
, M
8
, M
9
, M
10
and M
12
, and N-MOSFETs M
3
, M
4
, M
5
and M
6
) to provide high DC gain, a wide output voltage swing close to the positive power supply rail VDD, and to allow a low input reference voltage Vref of 1.2 volts (e.g., provided by a bandgap voltage source). This cascode stage drives the output transistor M
11
of the error amplifier, which in turn, drives the external pow
Mottola Steven J.
National Semiconductor Corporation
Vedder Price Kaufman & Kammholz P.C.
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