Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2011-06-14
2011-06-14
Mottola, Steven J (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S289000
Reexamination Certificate
active
07961049
ABSTRACT:
An amplifier circuit includes an amplifier stage (10) having an amplifier transistor (104) with a gate coupled to an input (100) of the amplifier stage, a source coupled to a reference connection (gnd) and a drain coupled to a positive power supply connection (V+). The amplifier circuit includes a bias stage (12) having a bias transistor (120), a drain resistance (124) and a source resistance (122). The bias transistor includes a gate coupled to a negative power supply connection (V−), a source coupled to the negative power supply connection (V−) via the source resistance and a drain coupled to the reference connection via the drain resistance and to the gate of the amplifier transistor. The bias stage includes a further resistance (20, 22) coupled from a node between the source of the bias transistor and the source resistance of the bias transistor to a circuit node that carries a voltage higher than the voltage at the negative power supply connection.
REFERENCES:
patent: 4990973 (1991-02-01), Ishikawa et al.
patent: 5506544 (1996-04-01), Staudinger et al.
patent: 5808515 (1998-09-01), Tsuruoka et al.
patent: 1 562 284 (2005-08-01), None
patent: 2000 124749 (2000-04-01), None
Yamanaka et al. “Ku-ban Low Noise MMIC Amplifier With Bias Circuit for Compensation of Temperature Dependence and Process Variation” IEE MTT-S International Microwave Symposium Digest, (IMS 2002) vol. 3 of 3 pp. 1427-1430, Jun. 2, 2002.
International Search Report for PCT/NL2006/000508 dated Mar. 13, 2007.
Busking Erik Bert
De Hek Andries Peter
Leydig Voit & Mayer Ltd
Mottola Steven J
Nederlandse Organisatie voor toegepast-natuurwetenschappelijk on
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