Amplifier supporting multiple gain modes

Details Amplifier supporting multiple gain modes Amplifier supporting multiple gain modes

2009-07-30

2011-10-04

Mottola, Steven (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S283000

Reexamination Certificate

active

08031005

ABSTRACT:
Techniques for designing a low-noise amplifier (LNA) for operation over a wide range of input power levels. In an exemplary embodiment, a first gain path is provided in parallel with a second gain path. The first gain path includes a differential cascode amplifier with inductor source degeneration. The second gain path includes a differential cascode amplifier without inductor source degeneration. The cascode transistors of the gain paths may be selectively biased to enable or disable the first and/or second gain path. By selectively biasing the cascode transistors and input transistors, various combinations of the first and second gain paths may be selected to provide an optimized gain configuration for any input power level.

REFERENCES:
patent: 7474158 (2009-01-01), Yim et al.
patent: 7679452 (2010-03-01), Afonso Perez
patent: 2005/0068106 (2005-03-01), Irvine
patent: 2007/0229154 (2007-10-01), Kim et al.
patent: 1748553 (2007-01-01), None
Che-Sheng Chen et al: “A 2.5GHz 90nm CMOS Triple Gain Mode LNA for WiMAX Applications” Signals, Systems and Electronics, 2007. ISSSE '07. International Symposium on, IEEE, PI, Jul. 1, 2007, pp. 367-369, XP031129290 ISBN: 978-1-4244-1448-2 pa.
International Search Report and Written Opinion—PCT/US2010/028353, International Search Authority—European Patent Office—Jul. 6, 2010.

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