Amplifiers – With semiconductor amplifying device – Including push-pull amplifier
Reexamination Certificate
1999-04-29
2001-04-24
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including push-pull amplifier
C330S273000
Reexamination Certificate
active
06222417
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an amplifier output stage comprising a first and a second transistor each provided with a bias terminal, a reference terminal and a transfer terminal, said transistors having their principal current paths arranged between a first and a second power supply terminal, a junction point between said current paths constituting an output terminal of the stage, the bias terminal of the first transistor being connected to an output of the amplifier, the bias terminal of the second transistor being connected to an input of the amplifier via a bias circuit.
Such output stages are commonly used in integrated circuits. They have the advantage of realizing an amplification of a signal present at the output of the amplifier at the expense of a low energy dissipation. The known output circuit has, however, a major drawback, which appears when the second transistor is in the saturated state. In this state, the second transistor features a parasitic transistor of a conductivity type which is opposed to that of the second transistor, the bias terminal, the reference terminal and the transfer terminal of the parasitic transistor being constituted by the transfer terminal, the bias terminal and the substrate, respectively, of the second transistor. When the second transistor is saturated, it receives a bias current at its bias terminal which is directed to the substrate via the main current path of the parasitic transistor. If the bias terminal of the second transistor has a low impedance, nothing limits the bias current value, which is precisely the case for the known output stages, in which the bias terminal of the second transistor is connected to the input of the amplifier whose equivalent impedance is necessarily low. This connection is realized either directly or via a bias circuit which may comprise a diode connected to a power supply terminal via the main current path of a transistor whose bias terminal is connected to the input of the amplifier, but the bias circuit does not in any case have a sufficient impedance to limit the bias current of the second transistor. The value of said bias current thus is not limited, because of the low impedance of the bias terminal of the second transistor, with the result that a strong parasitic current is injected into the substrate at the risk of disturbing the operation of all components present in the integrated circuit on the surface of the substrate, and may even damage this circuit. Moreover, when the second transistor leaves its saturated state so as to resume a linear operation mode under the effect of an increase of the potential at the output terminal of the stage, a necessary evacuation of the important amount of electric charge accumulated in the base of the second transistor generates a current pulse in the collector of said transistor, as the parasitic transistor has disappeared. Now, the power supply terminals of the integrated circuit are connected by means of wires to pins present on a protection housing incorporating the integrated circuit, which pins provide the electric connections between the integrated circuit and components outside the housing. These wires have an intrinsic inductance which, when subjected to a current pulse, generates a voltage peak of a very high value which may have destructive effects, or at least disturb the potential of the power supply terminals and thereby the operation of the whole integrated circuit.
SUMMARY OF THE INVENTION
It is an object of the present invention to remedy these drawbacks by proposing an output stage in which the value of the bias current of the second transistor is controlled when said transistor is in the saturated state, the control thus effected being inoperative when the second transistor is in the linear operating state.
According to the invention, an output stage as described in the opening paragraph is therefore characterized in that the bias circuit comprises:
a detection module intended to signal the instant when the second transistor enters the state of saturation, and
an impedance adaptation module intended, when activated, to attribute a high impedance to the bias terminal of the second transistor when said transistor becomes saturated.
In this output stage, the saturation of the second transistor causes a considerable increase of the impedance of its bias terminal. The presence of this strong impedance allows limitation of the bias current value until the second transistor resumes its linear operation mode.
In a particular embodiment of the invention, an output stage as described above is characterized in that the detection module is provided with means for producing a detection current at an output when the value of the current at the bias terminal of the second transistor exceeds a predetermined threshold, said detection current being intended to activate the impedance matching module.
In this embodiment, the information signaling the instant when the second transistor becomes saturated is materialized in the form of a current, which can be easily exploited. As will be explained hereinafter, this embodiment allows the use of simple and thus less costly structures for the impedance adaptation and detection modules.
In a particular embodiment of the invention, the impedance adaptation module comprises a third transistor, whose bias terminal is connected to the input of the amplifier via a resistor, and whose main current path is arranged in series with a first current source between the first and second power supply terminals, the reference terminal of the third transistor being connected to the bias terminal of the second transistor via the detection module, the bias terminal of the third transistor being further connected to the output of the detection module via a diode.
In this embodiment, which is advantageous by virtue of its simplicity, the sole presence of a detection current renders the diode conducting, thus activating the impedance matching module, which enables the limitation of the bias current of the second transistor.
In a preferred embodiment of the invention, the detection module comprises a fourth transistor, whose bias terminal is connected to the reference terminal of the third transistor, and whose transfer and reference terminals are connected to the first and second power supply terminals via second and third current sources, respectively, the transfer terminal of the fourth transistor constituting the output of the detection module, the reference terminal of said transistor being connected to the bias terminal of the second transistor.
This structure enables to adjust, in a simple and cheap manner, the threshold value above which the bias current will be considered to be representative of the instant when the second transistor becomes saturated. Indeed, when the value of said bias current exceeds the value of the difference between the values of the currents supplied by the second and third current sources, the output of the detection module will produce a negative detection current, i.e. it will pull from the outside a current whose value will be substantially equal to the difference between the bias current of the second transistor and the value of the current supplied by the second current source.
If the present invention may be used in all types of devices requiring amplification, its implementation is particularly advantageous in devices for selecting radio electric signals, often used in television receivers or radio telephone apparatuses. The invention thus also relates to a device for selecting radio electric signals, comprising:
an antenna and filtering system intended to supply, at an output, an electronic signal having a radio frequency and being representative of the selected radio electric signal,
an oscillator intended to supply an output signal having a tunable oscillation frequency,
a mixer intended to receive the output signals from the oscillator and the antenna and filtering system, and to supply an output signal having an intermediate frequency equal to the difference
Biren Steven R.
Choe Henry
Pascal Robert
U.S. Philips Corporation
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