Amplifier offset cancellation system

Details Amplifier offset cancellation system Amplifier offset cancellation system

1998-06-11

2000-03-07

Pascal, Robert

Amplifiers

With semiconductor amplifying device

Including d.c. feedback bias control for stabilization

330 9, 327307, H03F 130, H03F 102, H03L 500

Patent

active

060345691

ABSTRACT:
The DC level of the output of an amplifier may be dynamically adjusted depending on the operating conditions of the amplifier by comparing the output of the amplifier to a set reference value using a comparator. The output of the comparator is then fed to a state machine which adjusts the DC level of the amplifier output in an autocalibration process until the DC level of the output of the amplifier is substantially equal to the reference value. An undervoltage lockout circuit detects a power supply to the amplifier and causes the calibration to be initiated only when the power supply meets certain requirements. A change in the gain setting in the amplifier is also detected for automatically initiating the calibration process.

REFERENCES:
patent: 4730294 (1988-03-01), Funada
patent: 4833418 (1989-05-01), Quintus et al.
patent: 5061900 (1991-10-01), Vinn et al.

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