Amplifier for use in time-sharing applications

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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330 9, H03M 172

Patent

active

058350497

ABSTRACT:
A differential amplifier has (at least) four input-stage transistors that are switchably coupled to the inverting and noninverting input terminals and to the output terminal(s). In one embodiment, two of the transistors are permanently coupled between the input and output terminals, while the other two transistors are switchably coupled the input and output terminals, such that, during two-phased operations, each of the switchably coupled transistors is alternately connected in parallel to a different one of the two permanently coupled transistors. In this way, any charge (due to input capacitance) in one input-stage transistor from the previous clock phase will tend to negate similar charge in another input-stage transistor at the start of each clock phase. Such an amplifier can be efficiently used in time-sharing applications. For example, when used as the amplifier shared between two stages of a pipelined analog-to-digital converter, crosstalk between stages otherwise due to input capacitance of the amplifier can be reduced and possibly eliminated.

REFERENCES:
patent: 3586989 (1971-06-01), Wheable
patent: 5212486 (1993-05-01), Nagaraj
patent: 5594445 (1997-01-01), Ginetti
"Efficient Circuit Configurations for Algorithmic Analog to Digital Converters", by Krishnaswami Nagaraj, IEEE Transactions on Circuits and Systems--II: Analog and Digital Signal Processing, vol. 40, No. 12, Dec. 1993, pp. 777-785.
"A 10-b 20-Msample / s Analog-to-Digital Converter", by Stephen H. Lewis et al., IEEE Journal of of Solid-State Circuits, vol. 27. No. 3 Mar. 1992, pp. 351-358.
All -MOS Charge Redistribution Analog-to-Digital Conversion Techniques-Part 1, James L. McCreary and Paul R. Gray, IEEE Journal of Solid-State Circuits, vol. SC-10, No. 6, Dec. 1975, pp. 371-379.

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