Amplifier for improving open-loop gain and bandwidth in a...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C327S108000

Reexamination Certificate

active

06486821

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention is generally directed to switched capacitor systems and, in particular, to an amplifier for improving the open-loop gain and bandwidth of a switched capacitor system.
BACKGROUND OF THE INVENTION
Switched capacitor systems are used in a wide variety of applications, including digital-to-analog converter (DAC) circuits, analog-to-digital converter (ADC) circuits, equalizers, filters, and the like. A switched capacitor system typically comprises an operational amplifier (i.e., op-amp) with a first output (or feedback) capacitor (COUT
1
) coupled (directly or indirectly) between a first output and a first input of the op-amp and a first input capacitor (CIN
1
) coupled (directly or indirectly) between the first input and ground. The switched capacitor system also may comprise a second output (or feedback) capacitor (COUT
2
) coupled (directly or indirectly) between a second output and a second input of the op-amp and a second input capacitor (CIN
2
) coupled (directly or indirectly) between the second input and ground.
Through a series of switching operations, charge is distributed on these capacitors to effect a closed loop gain. This closed loop gain is subject to a finite error caused by the non-ideal open-loop gain of the operational amplifier. The open-loop frequency response is also attenuated by the capacitive voltage divider produced at the input between the feedback capacitor and the capacitor to ground. The effective capacitance of the capacitor to ground is equal to the sum of the capacitance of the fixed external capacitor and the input (parasitic) capacitance of the operational amplifier. Generally, the input parasitic capacitance is predominantly caused by the gate-to-source capacitance of MOSFET devices in the operational amplifier. Hereafter, the input parasitic capacitance may be approximated by using the gate-to-source capacitance interchangeably.
In any given system, reduction of the op-amp input capacitance reduces the capacitance voltage division at this node and improves the open-loop gain and bandwidth of the system. Reducing the op-amp input capacitance may be achieved by making the input transistors of the op-amp smaller. However, reducing op-amp input capacitance is problematic when dealing with very small devices. Very small channel length devices typically have higher gains than larger channel devices. However, small channel length devices (i.e., 0.18 micron) are unable to withstand large operating voltages. Hence, small channel length devices typically operate from a 1.6 volt to 2.0 volt power supply, while larger channel length device (i.e., 0.4 micron) typically operate from a 2.7 volt to 3.6 volt power supply. Thus, reducing the device size in order to reduce input capacitance often entails reducing the power supply. Since a reduced power supply results in reduced performance of the op-amp transistors, at least part of the benefit of reducing input capacitance is lost.
Therefore, there is a need in the art for an improved operational amplifier for use in switched capacitor systems. In particular, there is a need for an operational amplifier having a reduced input capacitance that is still able to operate from higher power supply voltages.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, it is a primary object of the present invention to provide an operational amplifier that has both thick-oxide transistors and thin-oxide transistor and operates from a high voltage supply. The present invention replaces a thick oxide transistor with a thin oxide transistor having smaller width (W) and length (L) at the input of the op-amp. Since the capacitance of the oxide (Cox) is inversely proportional to the thickness of the oxide (Tox), the thin-oxide input transistor would actually have increased input parasitic capacitance per square micron, if all other factors are the same.
To maintain the same amplifier characteristics, the W/L ratio of the transistors may be held constant. However, W and L are reduced proportionally. If the product, W×L×Cox, is lower for the thin oxide device, then replacing a thick-oxide transistor with a thin-oxide transistor having much smaller area decreases the overall input capacitance of the op-amp, thereby improving open-loop gain and bandwidth.
As an example, consider an operational amplifier that has two device (i.e., transistor) types. The first device has a minimum L=0.4, Tox=70 A, and a Cox=5 fF/um
2
. The second device has a minimum L=0.2, Tox=35 A, and a Cox=10 fF/um
2
. For a given W=40 and L=0.4, the first device has a parasitic capacitance, Cp
1
(e.g., approximately equal to gate-to-source capacitance, Cgs), of 0.4(40) (5 fF)=80 fF. If the second is scaled to obtain the same W/L ratio, with minimum L=0.2 and W=18, then the second has a parasitic capacitance Cp
2
=Cgs=0.2(18)(10 fF)=40 fF. Assume the output (feedback) capacitor, COUT, is 80 fF and the input capacitor to ground, CIN, is 80 fF. Therefore, the voltage division at the input of the op-amp is 80/160=0.5 for the first device. The voltage division at the input of the op-amp is 80/120=0.67 for the second device. This represents an improvement of 1.34 over the first device (or a 2.5 dB improvement in open-loop gain). Similarly, bandwidth is improved.
The present invention is able to use thin-oxide devices in an operational amplifier operating from a large power supply by replacing only devices that are not exposed to the full power supply voltage. For example, replacing some of the N-type transistors in an input differential pair of the op-amp allows such a switched-cap amplifying system to obtain improved open-loop gain and bandwidth using thin oxide devices while maintaining a power supply voltage suitable for use with the thick oxide devices. The biasing of the cascade transistors and other devices in the operational amplifier must be such that the thin-oxide transistors in the differential pair never see more than, for example, a 1.8 volt gate-to-source difference, gate-to-drain difference, or gate-to-bulk difference.
Thus, according to an advantageous embodiment of the present invention, there is provided an amplifier capable of operating from a power supply having a first voltage level, wherein the amplifier comprises: 1) a plurality of thick-oxide field effect transistors, each of the plurality of thick-oxide field effect transistors having a relatively thick oxide layer and fabricated using a first process such that the each thick-oxide field effect transistor is capable of withstanding a gate-to-source difference and a gate-to-drain difference at least equal to a first maximum operating voltage, wherein the first maximum operating voltage is at least equal to the first voltage level; and 2) a first thin-oxide field effect transistor coupled to a first input of the amplifier, the first thin-oxide field effect transistor having a relatively thin oxide layer and fabricated using a second process such that the first thin-oxide field effect transistor is capable of withstanding a gate-to-source difference, a gate-to-drain difference, and a gate-to-bulk difference at least equal to a second maximum operating voltage, wherein the second maximum operating voltage is less than the first voltage level.
According to one embodiment of the present invention, a configuration of the plurality of thick-oxide field effect transistors and the first thin-oxide field effect transistor prevents the first thin-oxide field effect transistor from being exposed to a gate-to-source difference greater than the second maximum operating voltage.
According to another embodiment of the present invention, the configuration of the plurality of thick-oxide field effect transistors and the first thin-oxide field effect transistor prevents the first thin-oxide field effect transistor from being exposed to at least one of a gate-to-drain difference and a gate-to-bulk difference

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