Amplifier design with biasing and power control aspects

Details Amplifier design with biasing and power control aspects Amplifier design with biasing and power control aspects

2011-04-05

2011-04-05

Choe, Henry K (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

C330S262000

Reexamination Certificate

active

07920027

ABSTRACT:
Techniques for biasing an amplifier using a replica circuit are disclosed. In an embodiment, a replica circuit having substantially the same topology and sizing as a push-pull amplifier circuit is coupled to a main push-pull amplifier circuit. A transistor in the replica circuit may be biased using feedback to generate a predetermined DC output voltage level, and such bias level may be applied to a corresponding transistor in the main push-pull amplifier circuit. In another embodiment, a transistor in a current bias module may be used to bias corresponding transistors in the main push-pull amplifier circuit and the replica circuit. Further techniques are disclosed for configuring the amplifier to have a non-uniform step size with finer resolution at lower power levels and coarser resolution at higher power levels to reduce power consumption at lower power levels.

REFERENCES:
patent: 5212455 (1993-05-01), Pernici et al.
patent: 5361041 (1994-11-01), Lish
patent: 6400227 (2002-06-01), Goldfarb et al.
patent: 6525569 (2003-02-01), Leon
patent: 6812777 (2004-11-01), Tamura et al.
patent: 7088969 (2006-08-01), Khorram
patent: 2003/0152139 (2003-08-01), Khorram
patent: 2006/0066407 (2006-03-01), Narendra et al.
patent: 1081573 (2001-03-01), None
Hayg Dabag et al: “Electrical Stress-free High Gain and High Swing Analog Buffer Using an Adaptive Biasing Scheme” Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium 0 N, IEEE, PI, May 1, 2007, pp. 945-948, XP031181418 ISBN: 978-1-4244-0920-4 p. 946, right-hand column, line 22—p. 947, left-hand column, line 6; figure 4.
International Search Report and Written Opinion—PCT/US2009/036568, International Search Authority—European Patent Office—Sep. 4, 2009.
Torralba A et al: “Class AB Output Stages for Low Voltage CMOS Opamps with Accurate Quiescent Current Control by Means of Dynamic Biasing” Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers, BO, vol. 36, No. 1-2, Jul. 1, 2003, pp. 69-77, XP019203877 ISSN: 1573-1979 p. 69, left-hand column, line 2—p. 73, left-hand column, line 12; figures 1-3.

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