Amplifiers – With semiconductor amplifying device – Including plural stages cascaded
Patent
1993-05-07
1994-10-04
Sikes, William L.
Amplifiers
With semiconductor amplifying device
Including plural stages cascaded
330291, 330293, 330296, 330311, H03G 1100, H03G 500
Patent
active
053529928
ABSTRACT:
An amplifier circuit having an emitter-grounded amplifying stage formed of a transistor Q1 and a load resistor R.sub.L and having an output stage including an emitter follower formed of transistors Q2 and Q3. The base of the transistor Q1 of the amplifying stage and the base of the transistor Q3 of the output stage are connected with each other for receiving input signals and biased by a bias circuitry 5. The input signals thus given to the base of transistor Q3 for the emitter follower of the output stage cause the transistors Q2 and Q3 to alternately turn on and off to provide a higher output driving power to the load connected to the output terminal than prior art amplifier circuits having conventional emitter followers and resistor feedback amplification networks.
REFERENCES:
patent: 4553108 (1985-11-01), Young
patent: 5180989 (1993-01-01), Sakurai et al.
"A wide-Band Class AB Monolithic Power Amplifier" Robert G. Meyer et al., IEEE Journal of Solid State Circuits, Feb. 1989.
"UHF-Band Bipolar Downconverter IC for TV Tuner", Nakata et al., NEC, vol. 41, No. 14/1988.
"High Speed, Low Power Circuit: SPL", Tanabe, et al., Hitachi Central Reasearch Lab.
Abraham Fetsum
NEC Corporation
Sikes William L.
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