Amplifier arrangement with multipath miller zero cancellation

Details Amplifier arrangement with multipath miller zero cancellation Amplifier arrangement with multipath miller zero cancellation

1994-06-21

1996-01-16

Mottola, Steven

Amplifiers

With semiconductor amplifying device

Including differential amplifier

330292, H03F 114

Patent

active

054851211

ABSTRACT:
An amplifier arrangement comprises an inverting transconductance stage having an input and an output; a capacitor coupled between the input and the output of the inverting transconductance stage; and signal current means having a first output coupled to the input of the inverting transconductance stage to provide a first signal current to the input of the inverting transconductance stage. The signal current means further comprises a second output coupled to the output of the inverting transconductance stage to provide a second signal current to the output of the inverting transconductance stage, which second signal current is substantially equal and in phase opposition to the first signal current. A second parallel path bypasses the Miller-compensated transconductance stage to eliminate the right half-plane zero of the Miller compensation.

REFERENCES:
patent: 4354162 (1982-10-01), Wright
patent: 4502017 (1985-02-01), Van de Plassche et al.
patent: 5155447 (1992-10-01), Huijsing et al.
P. R. Gray & R. G. Meyer, "MOS Operational Amplifier Design--A Tutorial Overview", IEEE Journal of Solid-State Circuits, vol. SC-17, No. 6, Dec. '92, pp. 969-982.
B. K. Ahuja, "An Improved Frequency Compensation Technique for CMOS Operational Amplifiers", IEEE Journal of Solid-State Circuits, vol. sc-18, No. 6, Dec. '83, pp. 629-633.

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