Amplifier arrangement

Details Amplifier arrangement Amplifier arrangement

2006-11-28

2006-11-28

Nguyen, Khanh V. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including signal feedback means

C330S076000, C330S282000, C330S288000

Reexamination Certificate

active

07142059

ABSTRACT:
The invention provides an amplifier arrangement which is of multistage design. The output transistor in the output stage has a coupling path between its control input and its controlled path. The coupling path comprises a series circuit comprising a Miller compensation capacitance and a resistance with a controllable resistance value. It is thus possible to ensure stable operation of the amplifier regardless of bias and load conditions while simultaneously reducing the quiescent current drawn.

REFERENCES:
patent: 4857863 (1989-08-01), Ganger et al.
patent: 5051705 (1991-09-01), Moghe et al.
patent: 6285257 (2001-09-01), Abe et al.
patent: 6630861 (2003-10-01), Kawaoka
“CMOS Analog Circuit Design”, P. Allen et al., 1987 Oxford University Press, Inc., Chapter 2, pp. 253-269.
“An Improved Frequency Compensation Technique for CMOS Operational Amplifiers”, Bhupendra K. Ahuja, IEEE Journal of Solid-State Circuits, vol. SC-18, No. 6, Dec. 1983, pp. 629-633.
“Introduction to CMOS OP-AMPS and Comparators”, R. Gregorian, 1999, John Willey & Sons, Chapter 4.4, 4 pgs.

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