Amplifier

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S264000, C330S269000

Reexamination Certificate

active

06759903

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to an amplifier having a difference amplification circuit formed on a semiconductor IC chip for amplifying analog signals.
BACKGROUND OF THE INVENTION
Current operational amplifiers having a difference amplifier circuit for amplifying analog signals are formed on semiconductor IC chips for use in such audio apparatus as voice codics, Hi-Fi audios, and cellular phones.
In an operational amplifier, a difference amplifier circuit includes a pair of p-channel MOSFETs (hereinafter referred to as p-type transistors) or a pair of n-channel MOSFETs (hereinafter referred to as n-type transistors). However, either type of difference pairs of transistors, incorporating p-type or n-type, has only a limited dynamic range for a given input signal, either in the upper or lower range of the signal. Hence, if a wide dynamic range is required, difference pairs of p-type and n-type transistors (referred to as p-type and n-type difference transistor pairs, respectively) are used to couple respective dynamic ranges of the pairs.
FIG. 1
shows a conventional operational amplifier circuit having both types of difference transistor pairs.
FIG. 2
shows a use of an operational amplifier OP as shown in FIG.
1
.
In the operational amplifier shown in
FIG. 1
, a p-type transistor M
11
having a gate and a drain connected together and a constant current power supply
11
are connected in series between a voltage supply Vdd and ground potential Gnd. The constant potential of the node of the p-type transistor M
11
and the constant current source
11
is supplied to the gate of a p-type transistor M
12
to place the p-type transistor M
12
in operation under the constant current from the constant current source
11
. Similarly, connected in series between the power supply potential Vdd and the ground Gnd are a p-type transistor M
13
having a gate and a drain connected together and a constant current source
12
. The constant potential of the node of the transistor M
13
and the current source
12
is supplied to the gate of a p-type transistor M
14
to place the p-type transistor M
14
in operation under the constant current from the constant current source
12
.
A p-type difference transistor pair Pd is formed of a p-type transistor M
15
having an inverting input terminal for receiving a signal Vinn (which signal will be referred to as inverting signal) and another p-type transistor M
16
having a non-inverting terminal for receiving a positive phase signal Vinp. The p-type difference transistor pair Pd is connected in series with the p-type transistor M
12
. Connected as a load to this p-type difference transistor pair Pd is a current mirror circuit which is made up of one n-type transistor M
17
and another n-type transistor M
18
. In the current mirror circuit, the gate of the n-type transistor M
17
is connected with the drain of the same transistor M
17
and with the drain of the p-type transistor M
15
and the gate of the n-type transistor M
18
.
The drain of the n-type transistor M
18
is connected with the drain of the p-type transistor M
16
and the gate of the n-type transistor M
19
which is connected in series with the p-type transistor M
14
between the power supply potential Vdd and the ground potential Gnd. The n-type transistor M
19
provides an output potential Vout at the drain thereof. An anti-oscillation resistor Ro and condenser Co are connected between the gate and the drain of the n-type transistor M
19
. The circuit arrangement mentioned above constitutes an amplifier circuit associated with the p-type difference transistor pair.
On the other hand, an amplifier circuit associated with an n-type difference transistor pair is established as follows. Connected in series between the power supply potential Vdd and the ground potential Gnd are a constant current source
21
and an n-type transistor M
28
. The node of the constant current source
21
and the n-type transistor M
28
is supplied to the gate of an n-type transistor M
27
to drive the n-type transistor M
27
at constant current.
The n-type transistor M
25
to which the positive phase signal Vinp is input and the n-type transistor M
26
to which the signal Vinn is input together constitute an n-type difference transistor pair Nd, which is connected in series with the n-type transistor M
27
. Connected as a load to the n-type difference transistor pair is a p-type transistor M
22
having its drain and gate connected with each other. In addition, a p-type transistor M
21
is provided which has a gate connected to the gate of the p-type transistor M
22
and a drain connected to the drain of the n-type transistor M
17
. The drain of the n-type transistor M
26
is connected with a p-type transistor M
23
having its drain connected with its gate. Further, a p-type transistor M
24
is provided which has a gate connected with the gate of the p-type transistor M
23
and a drain connected with the n-type transistor M
18
.
The operational amplifier OP thus formed is fed at the non-inverting input (+) terminal with a positive phase signal Vinp which is obtained by superposing a bias voltage Vb on an input signal Vin, and at the inverting input (−) terminal with an inverting input signal Vinn from the output end of the amplifier, as shown in FIG.
2
. This arrangement constitutes a voltage follower.
In this conventional operational amplifier, both the amplifier circuit in the p-type difference transistor pair Pd and the amplifier circuit in the n-type difference transistor pair Nd are always in operation. Hence, if the level of the positive phase signal Vinp becomes so high that its amplification by the p-type difference transistor pair Pd is limited, amplification by the amplifier circuit in the n-type difference transistor pair Nd will not be limited, thereby resulting in an unlimited amplification of the input signal Vinp. If on the other hand the level of the positive phase signal Vinp becomes so low that its amplification by the amplifier circuit in the n-type difference transistor pair Nd is limited-, its amplification by the amplifier circuit in the p-type difference transistor pair Pd is not limited, allowing unlimited amplification of the input signal in the low range. Thus, by the concurrent use of both types of difference transistor pairs Nd and Pd, the overall dynamic range of the amplifier can be expanded.
However, in such conventional amplifier as mentioned above, noise characteristics are significantly worse than an amplifier including a p-type difference transistor pair Pd.
A reason for this is that n-type transistors have worse 1/f noise characteristics than p-type transistors. “1/f noise” refers to noise having a 1/f dependence in the spectrum where f is the frequency, which is mainly due to flicker noises dominant in the output spectrum.
Therefore, a tradeoff for an expanded dynamic range by means of both types of difference transistor pairs is an increment of noises. In order to suppress 1/f noise, the sizes (channel lengths and/or channel widths) of the transistors may be enlarged, which however inevitably results in an increase in the area occupied by the amplifiers on the IC chip and hence the cost of the IC chip.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide an improved amplifier having difference transistor pairs which provide an expanded dynamic range with a suppressed noise level.
In accordance with one aspect of the invention, there is provided an amplifier, comprising;
a first amplifier circuit having a difference pair of: transistors having a first conduction-type (said pair referred to as difference transistor pair of the first conduction-type) for amplifying an input signal to provide a first output signal;
a second amplifier circuit having a difference pair of transistors having a second conduction-type (said pair referred to as difference transistor pair of the second conduction-type) for amplifying said input signal to provide a second output signal, wherein
only said first amplifier circuit is activated when the

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