Amplifiers – With semiconductor amplifying device – Including push-pull amplifier
Reexamination Certificate
2000-11-13
2002-05-07
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including push-pull amplifier
C330S264000, C330S267000, C330S268000
Reexamination Certificate
active
06384684
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to an amplifier and particularly, but not exclusively, to an amplifier suitable for use with low power supply voltages.
Portable equipment such as mobile telephones or audio or video players require integrated circuits in which mean power consumption is minimised, in order to obtain maximum battery life, but which enables correct handling of large signals. One of the elements frequently required is an amplifier and in order to meet the above requirements Class AB CMOS op-amps and buffers are commonly used. A particular problem with such amplifiers is how to set the standing current in the output stage, particularly at low supply voltages. Two significant requirements are to minimise wasted current when no signal is present and to ensure that both the N and P channel drive transistors are not both turned off at the same time as this leads to “cross-over distortion”. This latter requirement is particularly onerous at low signal amplitudes.
The output stage of a typical low voltage Class AB CMOS amplifier comprises common source output drivers. Such a construction is chosen in low voltage applications as it allows a signal to swing close to the power rail voltages. In a fully differential version two outputs would be present and there would be common mode feedback both the N and the P channel output transistor gates are driven by a high impedance output of a first stage amplifier. Both gates must rise and fall together with the signal to achieve correct push pull operation. The first stage output levels are, however, not well defined in absolute terms as they are produced at high impedance nodes and they only become well defined when global external feedback is applied. In order to set the minimum output current under no signal conditions it is necessary to know the difference between the gate voltages of the output transistors. One approach is to use simple tolerancing, but this is not a reliable option due to the high impedance nature of the driver nodes.
Previous Class AB amplifiers have frequently used a reference circuit, comprising a series connected chain of N and P devices through which the desired minimum bias current flows, to generate a voltage drop related to the sum of the gate-source voltages of both the N and P channel devices in series. In a source follower type of output this can provide an easy method of setting the bias and is used in many classical audio power amplifiers and bipolar op-amps. For low power supply voltage applications, however, the use of complementary source followers is not an option due to headroom considerations and consequently other solutions must be found. One solution often used is the floating “voltage source” but this has problems with device V
t
and saturation voltage.
U.S. Pat. No. 5,475,343 discloses a class AB complementary output stage that provides maximum output voltage swings and high load currents with minimum power dissipation. The output stage includes a first bias circuit that generates a pair of voltage nodes with a resistor controlled bias current. A second bias circuit comprises four current sources the outputs of which are coupled pair-wise across a resistor to form a pair of high impedance nodes at the resistor terminals. The voltage nodes of the first bias circuit establish bias currents in a differential input stage and in a pair of current sources of the second bias circuit. The outputs of the differential input stage drive the inputs of a second pair of current sources in the second bias circuit, which provide drive currents to the high impedance nodes. The output circuit comprises a pair of complementary common source transistors, the gates (bases) of which are driven by the high impedance nodes of the second bias circuit.
SUMMARY OF THE INVENTION
It is an object of the invention to enable the provision of an amplifier having a low power dissipation and operable at low power supply voltages.
The invention provides a class AB amplifier having an output stage comprising complementary common source (or emitter) transistors connected between the power supply rails, first means for setting the (or quiescent) minimum current of the output stage under zero signal conditions, said means comprising a bias resistor through which a bias current is passed and which is connected between the gate (or base) electrodes of the transistors, second means for determining the bias current through the bias resistor, said second means comprising reference current generating means, means for passing the reference current through first and second diode connected complementary reference field effect transistors, means for monitoring the gate (or base) potentials of the first and second reference transistors, and means for applying the gate (or base) potentials to opposite ends of a reference resistor, and third means for sensing the current through the reference resistor and applying a current dependent thereon to the bias resistor.
By providing a reference current source to determine the currents through the reference transistors the currents can be made substantially independent of the supply voltage. Consequently the gate-source (or base-emitter) potentials of the reference transistors remain substantially constant and independent of the supply voltage.
The quiescent current generating means may comprise a first current generator whose output current is passed through the first reference transistor and a second current generator whose output current is passed through the second transistor, the currents produced by the first and second current generators being substantially equal.
The provision of two separate current sources allows the two gate (or base) voltages to become closer together than if a single current source connected between the two reference transistors was used.
The means for monitoring and applying the gate (or base) potential of the second reference transistor to one end of the reference resistor may comprise an operational amplifier.
The means for monitoring and applying the gate (or base) potential of the first reference transistor to the other end of the reference resistor may comprise a buffer amplifier.
Alternatively, the gate (or base) electrode of the first reference transistor may be directly connected to the other end of the reference resistor means being provided for additionally generating a current having a value slightly less than the reference current and applying said current to the other end of the reference resistor.
Means may be provided for reversing the direction of current flow in the bias resistor.
This allows operation at very low power supply voltages when the voltage difference between the two output transistor gates (or bases) may change sign. Such an arrangement is particularly useful with battery powered devices, such as mobile phones, where operation with a wide range of voltages as the charge state of the battery changes with use may be required.
The reversing means may comprise a comparator for comparing the gate (or base) voltages of the first and second reference transistors and switching means for reversing the direction of current flow through the reference and bias resistors in dependence on the output of the comparator.
REFERENCES:
patent: 3995228 (1976-11-01), Pass
patent: 4038607 (1977-07-01), Schade, Jr.
patent: 4728903 (1988-03-01), Reiffin
patent: 4752745 (1988-06-01), Pass
patent: 5475343 (1995-12-01), Bee
patent: 5726602 (1998-03-01), Brown
patent: 5754078 (1998-05-01), Tamagawa
patent: 5815040 (1998-09-01), Barbetta
patent: 0409476 (1991-01-01), None
patent: 0007292 (2000-02-01), None
Nguyen Patricia T.
U.S. Philips Corporation
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