Amorphous tin films for an integrated capacitor dielectric/botto

Details Amorphous tin films for an integrated capacitor dielectric/botto Amorphous tin films for an integrated capacitor dielectric/botto

1997-06-04

2000-08-22

Tsai, Jey

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

438250, 438240, H01L 218239, H01G 706

Patent

active

061071056

ABSTRACT:
The present invention provides a capacitor formed in a dynamic random access memory (DRAM) semiconductor device, the capacitor comprising: a polysilicon layer to making contact with a diffusion region of an access device; a TiN comprising layer overlying the polysilicon layer; the TiN comprising layer and the polysilicon layer are patterned to serve as a bottom capacitor plate; a layer of dielectric material overlying the patterned TiN comprising layer; and a top capacitor plate. A method for forming the capacitor comprises the steps of: providing a opening to a diffusion region in an underlying substrate of a wordline activated transistor; forming a TiN comprising layer to make contact with the diffusion via the opening; patterning the TiN comprising layer into an individual bottom capacitor plate; forming a layer of dielectric material; and forming a top capacitor plate.

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