Amorphous silicon layer for top surface of semiconductor device

Details Amorphous silicon layer for top surface of semiconductor device Amorphous silicon layer for top surface of semiconductor device

1996-04-23

1997-08-05

Niebling, John

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438612, 438 17, 438106, H01L 21265, H01L 2120, H01L 2144, G01R 3126

Patent

active

056542062

ABSTRACT:
A layer of amorphous silicon covers the top surface of a semiconductor wafer to act as a moisture and contaminant barrier and to prevent the formation of aluminum hillocks on the aluminum bonding pads for the source and gate electrodes of a power MOSFET or other power semiconductor device. The amorphous silicon is easily penetrated by wire bonding apparatus used to make wire bonds to the conductor pads beneath the amorphous silicon.

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patent: 5268586 (1993-12-01), Mukherjee et al.
patent: 5288653 (1994-02-01), Enjoh

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