Amorphous semiconductor device

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357 2, 357 4, 357 58, H01L 2714

Patent

active

046986588

ABSTRACT:
An amorphous semiconductor device comprising a layered structure having a p-amorphous silicon layer, an i-amorphous silicon layer, an n-amorphous silicon layer, an i-amorphous silicon layer and a p-amorphous silicon layer, or an n-amorphous silicon layer, an i-amorphous silicon layer, a p-amorphous silicon layer, an i-amorphous silicon layer and an n-amorphous silicon layer, in sequence, on a substrate, electrodes being disposed on the top layer, the central layer and the bottom layer, respectively.

REFERENCES:
patent: 4387265 (1983-06-01), Dalal
"Formation Kinetics and Control of Microcrystalline in .mu.c-Si:H from Glow Discharge Plasma", A. Matsuda, Journal of Non-Crystalline Solids, 59 & 60 (1983), 767-774.

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