Aluminum metal line of a semiconductor device and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S758000, C257S763000, C257S765000

Reexamination Certificate

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07977794

ABSTRACT:
A method of forming an aluminum line of a semiconductor device where first A metal thin layer, a first aluminum layer, and a first B metal thin layer are sequentially applied on an interlayer insulating layer. A photolithography process is performed to form a metal line pattern, and etching is performed thereon. An intermetallic dielectric layer is applied on the metal line pattern. The first B metal thin layer is removed by a chemical mechanical planarization process to form a first stage metal line. A second aluminum layer and a second metal thin layer are sequentially applied. Photoresist is applied, a photolithography process is performed to form a metal line pattern, and etching is performed to form a second stage metal line. An intermetallic dielectric layer is applied on the second stage metal line. A chemical mechanical planarization process is performed on the second intermetallic dielectric layer.

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patent: 6346480 (2002-02-01), Yamamoto et al.
patent: 6383914 (2002-05-01), Yasuda
patent: 6528414 (2003-03-01), Kasuya
patent: 7057285 (2006-06-01), Lee et al.
patent: 7119440 (2006-10-01), Huang

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