Alumina interconnection substrate for an electronic component, a

Details Alumina interconnection substrate for an electronic component, a Alumina interconnection substrate for an electronic component, a

1984-12-10

1987-05-05

Swisher, Nancy

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

428698, 428901, H05K 300, N05K 104, B32B 324

Patent

active

046632158

ABSTRACT:
The substrate is formed by a stack of sheets of dielectric material (10) at least some of which have conductive patterns thereon (21-24); the substrate has conductive emerging portions (31, 32) for connecting the terminals of the component (1) to at least one internal layer provided with conductive tracks (24) providing layer-to-layer interconnection and interconnection with emerging portions in accordance with a pre-established patterns. According to the invention, the composition of the dielectric material comprises 92% to 98% alumina, and preferably 96%, with a melting agent based on magnesia titanate enabling the maximum firing temperature to be reduced to about 1400.degree. C. The conductive patterns are made of a non-oxidizable metal which is not meltable at high temperature, e.g. palladium or a silver-palladium alloy. The properties of the substrate obtained in this manner are comparable to those of a substrate made of 99.9% ultra-pure alumina. The invention is also applicable to multi-level chip carriers made of this material.

REFERENCES:
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patent: 3095340 (1963-06-01), Triller
patent: 3681135 (1972-08-01), Cheary
patent: 4135038 (1979-01-01), Tahami et al.
patent: 4340635 (1982-07-01), Tangman et al.
patent: 4465727 (1984-08-01), Fujita et al.
patent: 4595665 (1986-06-01), Takayama et al.
EPO 0 045 877, 2/82, Bajorek et al.
EPO 0 027 017, 4/81, Akasaki et al.
EPO 0 027 825, 5/81, Hashimoto et al.
Electronics, vol. 42, 5/1969, Alumina Layer Cake, Keiler et al.

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