ALU operation: modulo two sum

Details ALU operation: modulo two sum ALU operation: modulo two sum

1984-09-26

1988-05-03

Harkcom, Gary V.

Excavating

364716, 307472, G06F 1110, G06F 738, G06F 750

Patent

active

047425202

ABSTRACT:
A system for use in conjunction with the ALUs of computers, mini-computers, micro-computers and microprocessors wherein, upon a predetermined single command, the ALUs will be arranged to operate in a parity check mode or as a mask without otherwise disturbing the normal circuit operation of the ALUs utilized.

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Turner, The Illustrated Dictionary of Electronics, p. 55, 1980, Tab Books, Blue Ridge Summit, Pa.

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